X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FB4860QDS.h;h=2041b7bb3e58238b65325b0772d95e3627671805;hb=cb33bda44f4bbf6fb58adf41dced313ca38da6fc;hp=cd4333f2f149bd4db78bf20d8dadf7d3a6e26a7c;hpb=6b29a395b62965eef6b5065d3a526a8588a92038;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index cd4333f..2041b7b 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -19,7 +19,6 @@ #else #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -36,7 +35,6 @@ #define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#define CONFIG_SYS_NO_FLASH #endif #endif #endif @@ -47,13 +45,9 @@ #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_NO_FLASH #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -66,9 +60,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS -#define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ @@ -80,8 +72,6 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ - /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x77 @@ -116,7 +106,7 @@ #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_MTD_NOR_FLASH #if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL) #define CONFIG_ENV_IS_NOWHERE #endif @@ -228,13 +218,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_SPL_BUILD #define CONFIG_FSL_DDR_INTERACTIVE #endif @@ -683,7 +671,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ #ifdef CONFIG_FMAN_ENET @@ -715,7 +702,6 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#define CONFIG_CMD_DATE #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ERRATA #define CONFIG_CMD_IRQ @@ -737,9 +723,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI - -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif @@ -783,9 +767,6 @@ unsigned long get_board_ddr_clk(void); /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 - -#define CONFIG_BAUDRATE 115200 - #define __USB_PHY_TYPE ulpi #ifdef CONFIG_ARCH_B4860