X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FAdder.h;h=7389c38b9e15aab1d808ac81bb24da7e35d825b0;hb=794a5924972fc8073616e98a2668da4a5f9aea90;hp=0e6b50f8b0e019e8124ccb6c818908e68c1da92f;hpb=7b230f61db319d87d51449d4620d520822813fbb;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/Adder.h b/include/configs/Adder.h
index 0e6b50f..7389c38 100644
--- a/include/configs/Adder.h
+++ b/include/configs/Adder.h
@@ -37,9 +37,12 @@
 
 #define CONFIG_ETHER_ON_FEC1
 #define CONFIG_ETHER_ON_FEC2
+#define CONFIG_HAS_ETH0
+#define CONFIG_HAS_ETH1
 
 #if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2)
 #define CFG_DISCOVER_PHY
+#define CONFIG_MII_INIT		1
 #define FEC_ENET
 #endif /* CONFIG_ETHER_ON_FEC || CONFIG_ETHER_ON_FEC2 */
 
@@ -52,15 +55,26 @@
 #define CFG_8xx_CPUCLK_MAX		133000000
 #endif /* CONFIG_MPC852T */
 
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL  \
-				| CFG_CMD_DHCP   \
-				| CFG_CMD_IMMAP  \
-				| CFG_CMD_MII    \
-				| CFG_CMD_PING   \
-				)
 
-/* This must be included AFTER the definition of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
 
 #define CONFIG_BOOTDELAY	5		/* Autoboot after 5 seconds	*/
 #define CONFIG_BOOTCOMMAND	"bootm fe040000"	/* Autoboot command	*/
@@ -135,7 +149,7 @@
 
 /* Environment is in flash */
 #define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE	0x10000 	/* We use one complete sector	*/
+#define CFG_ENV_SECT_SIZE	0x10000		/* We use one complete sector	*/
 #define CFG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 
 #define CONFIG_ENV_OVERWRITE
@@ -177,16 +191,16 @@
 #define CFG_TBSCR		(TBSCR_TBF | TBSCR_TBE)
 
 /* PISCR - Periodic Interrupt Status and Control */
-#define CFG_PISCR       	(PISCR_PS | PISCR_PITF)
+#define CFG_PISCR		(PISCR_PS | PISCR_PITF)
 
 /* PLPRCR - PLL, Low-Power, and Reset Control Register */
-/* #define CFG_PLPRCR      	PLPRCR_TEXPS */
+/* #define CFG_PLPRCR		PLPRCR_TEXPS */
 
 /* SCCR - System Clock and reset Control Register */
-#define SCCR_MASK       	SCCR_EBDF11
+#define SCCR_MASK		SCCR_EBDF11
 #define CFG_SCCR		SCCR_RTSEL
 
-#define CFG_DER         	0
+#define CFG_DER			0
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
@@ -201,4 +215,8 @@
 #define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from flash	*/
 #define BOOTFLAG_WARM		0x02	/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
 #endif /* __CONFIG_H */