X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Faltera.h;h=44a1ee5635a1681882349a8c949d64a60538f0d9;hb=6d0f6bcf337c5261c08fabe12982178c2c489d76;hp=c03fe87c414f6ab61bf7ab97799633536e3b583b;hpb=71edc271816ec82cf0550dd6980be2da3cc2ad9e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/altera.h b/include/altera.h
index c03fe87..44a1ee5 100644
--- a/include/altera.h
+++ b/include/altera.h
@@ -29,19 +29,19 @@
 
 /* Altera Model definitions
  *********************************************************************/
-#define CFG_ACEX1K		CFG_FPGA_DEV( 0x1 )
-#define CFG_CYCLON2		CFG_FPGA_DEV( 0x2 )
-#define CFG_STRATIX_II		CFG_FPGA_DEV( 0x4 )
+#define CONFIG_SYS_ACEX1K		CONFIG_SYS_FPGA_DEV( 0x1 )
+#define CONFIG_SYS_CYCLON2		CONFIG_SYS_FPGA_DEV( 0x2 )
+#define CONFIG_SYS_STRATIX_II		CONFIG_SYS_FPGA_DEV( 0x4 )
 
-#define CFG_ALTERA_ACEX1K	(CFG_FPGA_ALTERA | CFG_ACEX1K)
-#define CFG_ALTERA_CYCLON2	(CFG_FPGA_ALTERA | CFG_CYCLON2)
-#define CFG_ALTERA_STRATIX_II	(CFG_FPGA_ALTERA | CFG_STRATIX_II)
+#define CONFIG_SYS_ALTERA_ACEX1K	(CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_ACEX1K)
+#define CONFIG_SYS_ALTERA_CYCLON2	(CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_CYCLON2)
+#define CONFIG_SYS_ALTERA_STRATIX_II	(CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_STRATIX_II)
 /* Add new models here */
 
 /* Altera Interface definitions
  *********************************************************************/
-#define CFG_ALTERA_IF_PS	CFG_FPGA_IF( 0x1 )	/* passive serial */
-#define CFG_ALTERA_IF_FPP	CFG_FPGA_IF( 0x2 )	/* fast passive parallel */
+#define CONFIG_SYS_ALTERA_IF_PS	CONFIG_SYS_FPGA_IF( 0x1 )	/* passive serial */
+#define CONFIG_SYS_ALTERA_IF_FPP	CONFIG_SYS_FPGA_IF( 0x2 )	/* fast passive parallel */
 /* Add new interfaces here */
 
 typedef enum {				/* typedef Altera_iface */