X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fahci.h;h=e8dee5357514c1cb33140da968626d8217f145ba;hb=ab77f24119e80257de4ab017b877f92f96980562;hp=78a8c55f7ba736355e425b28a3adf5f14d563534;hpb=326ea986ac150acdc7656d57fca647db80b50158;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/ahci.h b/include/ahci.h
index 78a8c55..e8dee53 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -58,6 +58,10 @@
 #define PORT_SCR_ERR		0x30 /* SATA phy register: SError */
 #define PORT_SCR_ACT		0x34 /* SATA phy register: SActive */
 
+#ifdef CONFIG_SUNXI_AHCI
+#define PORT_P0DMACR		0x70 /* SUNXI specific "DMA register" */
+#endif
+
 /* PORT_IRQ_{STAT,MASK} bits */
 #define PORT_IRQ_COLD_PRES	(1 << 31) /* cold presence detect */
 #define PORT_IRQ_TF_ERR		(1 << 30) /* task file error */
@@ -87,6 +91,11 @@
 				| PORT_IRQ_DMAS_FIS | PORT_IRQ_PIOS_FIS	\
 				| PORT_IRQ_D2H_REG_FIS
 
+/* PORT_SCR_STAT bits */
+#define PORT_SCR_STAT_DET_MASK	0x3
+#define PORT_SCR_STAT_DET_COMINIT 0x1
+#define PORT_SCR_STAT_DET_PHYRDY 0x3
+
 /* PORT_CMD bits */
 #define PORT_CMD_ATAPI		(1 << 24) /* Device is ATAPI */
 #define PORT_CMD_LIST_ON	(1 << 15) /* cmd list DMA engine running */
@@ -103,29 +112,6 @@
 
 #define AHCI_MAX_PORTS		32
 
-/* SETFEATURES stuff */
-#define SETFEATURES_XFER	0x03
-#define XFER_UDMA_7		0x47
-#define XFER_UDMA_6		0x46
-#define XFER_UDMA_5		0x45
-#define XFER_UDMA_4		0x44
-#define XFER_UDMA_3		0x43
-#define XFER_UDMA_2		0x42
-#define XFER_UDMA_1		0x41
-#define XFER_UDMA_0		0x40
-#define XFER_MW_DMA_2		0x22
-#define XFER_MW_DMA_1		0x21
-#define XFER_MW_DMA_0		0x20
-#define XFER_SW_DMA_2		0x12
-#define XFER_SW_DMA_1		0x11
-#define XFER_SW_DMA_0		0x10
-#define XFER_PIO_4		0x0C
-#define XFER_PIO_3		0x0B
-#define XFER_PIO_2		0x0A
-#define XFER_PIO_1		0x09
-#define XFER_PIO_0		0x08
-#define XFER_PIO_SLOW		0x00
-
 #define ATA_FLAG_SATA		(1 << 3)
 #define ATA_FLAG_NO_LEGACY	(1 << 4) /* no legacy mode check */
 #define ATA_FLAG_MMIO		(1 << 6) /* use MMIO, not PIO */
@@ -175,5 +161,6 @@ struct ahci_probe_ent {
 };
 
 int ahci_init(u32 base);
+int ahci_reset(u32 base);
 
 #endif