X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=gdb%2Fxtensa-tdep.c;h=dcdaa831fa297be04031b4a8f851cb230514f2a2;hb=ee959deb576c46b85b6174626d700e1393256adf;hp=f6dacf83fb3ed6c367c53787e32a7dbab8d5ed43;hpb=dbab50dedadd99af06cec58edab31055c926810f;p=platform%2Fupstream%2Fbinutils.git diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c index f6dacf8..dcdaa83 100644 --- a/gdb/xtensa-tdep.c +++ b/gdb/xtensa-tdep.c @@ -1,7 +1,6 @@ /* Target-dependent code for the Xtensa port of GDB, the GNU debugger. - Copyright (C) 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011 - Free Software Foundation, Inc. + Copyright (C) 2003-2014 Free Software Foundation, Inc. This file is part of GDB. @@ -38,7 +37,6 @@ #include "dwarf2.h" #include "dwarf2-frame.h" #include "dwarf2loc.h" -#include "frame.h" #include "frame-base.h" #include "frame-unwind.h" @@ -49,14 +47,13 @@ #include "command.h" #include "gdbcmd.h" -#include "gdb_assert.h" #include "xtensa-isa.h" #include "xtensa-tdep.h" #include "xtensa-config.h" -static int xtensa_debug_level = 0; +static unsigned int xtensa_debug_level = 0; #define DEBUGWARN(args...) \ if (xtensa_debug_level > 0) \ @@ -121,7 +118,7 @@ static int xtensa_debug_level = 0; #define PS_WOE (1<<18) #define PS_EXC (1<<4) -static inline int +static int windowing_enabled (struct gdbarch *gdbarch, unsigned int ps) { /* If we know CALL0 ABI is set explicitly, say it is Call0. */ @@ -162,7 +159,7 @@ areg_number (struct gdbarch *gdbarch, int ar_regnum, unsigned int wb) } /* Read Xtensa register directly from the hardware. */ -static inline unsigned long +static unsigned long xtensa_read_register (int regnum) { ULONGEST value; @@ -172,7 +169,7 @@ xtensa_read_register (int regnum) } /* Write Xtensa register directly to the hardware. */ -static inline void +static void xtensa_write_register (int regnum, ULONGEST value) { regcache_raw_write_unsigned (get_current_regcache (), regnum, value); @@ -318,15 +315,14 @@ xtensa_register_type (struct gdbarch *gdbarch, int regnum) if (tp == NULL) { - char *name = xmalloc (16); + char *name = xstrprintf ("int%d", size * 8); tp = xmalloc (sizeof (struct ctype_cache)); tp->next = tdep->type_entries; tdep->type_entries = tp; tp->size = size; - - sprintf (name, "int%d", size * 8); tp->virtual_type - = arch_integer_type (gdbarch, size * 8, 1, xstrdup (name)); + = arch_integer_type (gdbarch, size * 8, 1, name); + xfree (name); } reg->ctype = tp->virtual_type; @@ -453,7 +449,7 @@ xtensa_register_write_masked (struct regcache *regcache, /* Read a tie state or mapped registers. Read the masked areas of the registers and assemble them into a single value. */ -static void +static enum register_status xtensa_register_read_masked (struct regcache *regcache, xtensa_register_t *reg, gdb_byte *buffer) { @@ -479,8 +475,12 @@ xtensa_register_read_masked (struct regcache *regcache, int r = mask->mask[i].reg_num; if (r >= 0) { + enum register_status status; ULONGEST val; - regcache_cooked_read_unsigned (regcache, r, &val); + + status = regcache_cooked_read_unsigned (regcache, r, &val); + if (status != REG_VALID) + return status; regval = (unsigned int) val; } else @@ -535,12 +535,14 @@ xtensa_register_read_masked (struct regcache *regcache, buffer[i] = mem & 0xff; mem >>= 8; } + + return REG_VALID; } /* Read pseudo registers. */ -static void +static enum register_status xtensa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, @@ -561,16 +563,20 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch, && (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15)) { gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE); + enum register_status status; - regcache_raw_read (regcache, gdbarch_tdep (gdbarch)->wb_regnum, buf); + status = regcache_raw_read (regcache, + gdbarch_tdep (gdbarch)->wb_regnum, + buf); + if (status != REG_VALID) + return status; regnum = arreg_number (gdbarch, regnum, extract_unsigned_integer (buf, 4, byte_order)); } /* We can always read non-pseudo registers. */ if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)) - regcache_raw_read (regcache, regnum, buffer); - + return regcache_raw_read (regcache, regnum, buffer); /* We have to find out how to deal with priveleged registers. Let's treat them as pseudo-registers, but we cannot read/write them. */ @@ -581,6 +587,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch, buffer[1] = (gdb_byte)0; buffer[2] = (gdb_byte)0; buffer[3] = (gdb_byte)0; + return REG_VALID; } /* Pseudo registers. */ else if (regnum >= 0 @@ -598,7 +605,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch, { warning (_("cannot read register %s"), xtensa_register_name (gdbarch, regnum)); - return; + return REG_VALID; } } @@ -609,26 +616,23 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch, if (flags & xtTargetFlagsUseFetchStore) { warning (_("cannot read register")); - return; + return REG_VALID; } /* On some targets (esp. simulators), we can always read the reg. */ else if ((flags & xtTargetFlagsNonVisibleRegs) == 0) { warning (_("cannot read register")); - return; + return REG_VALID; } } /* We can always read mapped registers. */ else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState) - { - xtensa_register_read_masked (regcache, reg, buffer); - return; - } + return xtensa_register_read_masked (regcache, reg, buffer); /* Assume that we can read the register. */ - regcache_raw_read (regcache, regnum, buffer); + return regcache_raw_read (regcache, regnum, buffer); } else internal_error (__FILE__, __LINE__, @@ -659,7 +663,6 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch, && (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15)) { gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE); - unsigned int wb; regcache_raw_read (regcache, gdbarch_tdep (gdbarch)->wb_regnum, buf); @@ -734,15 +737,6 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch, _("invalid register number %d"), regnum); } -/* Return a character representation of a hex-decimal digit. - The value of "xdigit" is assumed to be in a range [0..15]. */ - -static inline -char xtensa_hextochar (int xdigit) -{ - return '0' + xdigit; -} - static struct reggroup *xtensa_ar_reggroup; static struct reggroup *xtensa_user_reggroup; static struct reggroup *xtensa_vectra_reggroup; @@ -760,7 +754,7 @@ xtensa_init_reggroups (void) for (i = 0; i < XTENSA_MAX_COPROCESSOR; i++) { - cpname[2] = xtensa_hextochar (i); + cpname[2] = '0' + i; xtensa_cp[i] = reggroup_new (cpname, USER_REGGROUP); } } @@ -844,7 +838,8 @@ xtensa_register_reggroup_p (struct gdbarch *gdbarch, if (group == restore_reggroup) return (regnum < gdbarch_num_regs (gdbarch) && (reg->flags & SAVE_REST_FLAGS) == SAVE_REST_VALID); - if ((cp_number = xtensa_coprocessor_register_group (group)) >= 0) + cp_number = xtensa_coprocessor_register_group (group); + if (cp_number >= 0) return rg & (xtRegisterGroupCP0 << cp_number); else return 1; @@ -915,23 +910,18 @@ xtensa_gregset = }; -/* Return the appropriate register set for the core - section identified by SECT_NAME and SECT_SIZE. */ +/* Iterate over supported core file register note sections. */ -static const struct regset * -xtensa_regset_from_core_section (struct gdbarch *core_arch, - const char *sect_name, - size_t sect_size) +static void +xtensa_iterate_over_regset_sections (struct gdbarch *gdbarch, + iterate_over_regset_sections_cb *cb, + void *cb_data, + const struct regcache *regcache) { - DEBUGTRACE ("xtensa_regset_from_core_section " - "(..., sect_name==\"%s\", sect_size==%x)\n", - sect_name, (unsigned int) sect_size); + DEBUGTRACE ("xtensa_iterate_over_regset_sections\n"); - if (strcmp (sect_name, ".reg") == 0 - && sect_size >= sizeof(xtensa_elf_gregset_t)) - return &xtensa_gregset; - - return NULL; + cb (".reg", sizeof (xtensa_elf_gregset_t), &xtensa_gregset, + NULL, cb_data); } @@ -1157,7 +1147,7 @@ xtensa_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR current_pc) CORE_ADDR start_addr; xtensa_isa isa; xtensa_insnbuf ins, slot; - char ibuf[XTENSA_ISA_BSZ]; + gdb_byte ibuf[XTENSA_ISA_BSZ]; CORE_ADDR ia, bt, ba; xtensa_format ifmt; int ilen, islots, is; @@ -1430,7 +1420,8 @@ static int xtensa_session_once_reported = 1; /* Report a problem with prologue analysis while doing backtracing. But, do it only once to avoid annoyng repeated messages. */ -static inline void warning_once () +static void +warning_once (void) { if (xtensa_session_once_reported == 0) warning (_("\ @@ -1549,6 +1540,7 @@ static const struct frame_unwind xtensa_unwind = { NORMAL_FRAME, + default_frame_unwind_stop_reason, xtensa_frame_this_id, xtensa_frame_prev_register, NULL, @@ -1682,7 +1674,7 @@ xtensa_store_return_value (struct type *type, static enum return_value_convention xtensa_return_value (struct gdbarch *gdbarch, - struct type *func_type, + struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, @@ -2033,7 +2025,7 @@ call0_ret (CORE_ADDR start_pc, CORE_ADDR finish_pc) #define RETURN_RET goto done xtensa_isa isa; xtensa_insnbuf ins, slot; - char ibuf[XTENSA_ISA_BSZ]; + gdb_byte ibuf[XTENSA_ISA_BSZ]; CORE_ADDR ia, bt, ba; xtensa_format ifmt; int ilen, islots, is; @@ -2391,7 +2383,7 @@ call0_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR ia; /* Current insn address in prologue. */ CORE_ADDR ba = 0; /* Current address at base of insn buffer. */ CORE_ADDR bt; /* Current address at top+1 of insn buffer. */ - char ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */ + gdb_byte ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */ xtensa_isa isa; /* libisa ISA handle. */ xtensa_insnbuf ins, slot; /* libisa handle to decoded insn, slot. */ xtensa_format ifmt; /* libisa instruction format. */ @@ -2714,9 +2706,9 @@ call0_frame_cache (struct frame_info *this_frame, too bad. */ int i; - for (i = 0; - (i < C0_NREGS) && - (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA); + for (i = 0; + (i < C0_NREGS) + && (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA); ++i); if (i >= C0_NREGS && cache->c0.c0_rt[C0_RA].fr_reg == C0_RA) i = C0_RA; @@ -2806,7 +2798,7 @@ execute_code (struct gdbarch *gdbarch, CORE_ADDR current_pc, CORE_ADDR wb) { xtensa_isa isa; xtensa_insnbuf ins, slot; - char ibuf[XTENSA_ISA_BSZ]; + gdb_byte ibuf[XTENSA_ISA_BSZ]; CORE_ADDR ia, bt, ba; xtensa_format ifmt; int ilen, islots, is; @@ -2815,8 +2807,7 @@ execute_code (struct gdbarch *gdbarch, CORE_ADDR current_pc, CORE_ADDR wb) int fail = 0; void (*func) (struct gdbarch *, int, int, int, CORE_ADDR); - int at, as, offset; - int num_operands; + uint32_t at, as, offset; /* WindowUnderflow12 = true, when inside _WindowUnderflow12. */ int WindowUnderflow12 = (current_pc & 0x1ff) >= 0x140; @@ -3284,8 +3275,8 @@ xtensa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) xtensa_add_reggroups (gdbarch); set_gdbarch_register_reggroup_p (gdbarch, xtensa_register_reggroup_p); - set_gdbarch_regset_from_core_section (gdbarch, - xtensa_regset_from_core_section); + set_gdbarch_iterate_over_regset_sections + (gdbarch, xtensa_iterate_over_regset_sections); set_solib_svr4_fetch_link_map_offsets (gdbarch, svr4_ilp32_fetch_link_map_offsets); @@ -3310,14 +3301,14 @@ _initialize_xtensa_tdep (void) gdbarch_register (bfd_arch_xtensa, xtensa_gdbarch_init, xtensa_dump_tdep); xtensa_init_reggroups (); - add_setshow_zinteger_cmd ("xtensa", - class_maintenance, - &xtensa_debug_level, + add_setshow_zuinteger_cmd ("xtensa", + class_maintenance, + &xtensa_debug_level, _("Set Xtensa debugging."), _("Show Xtensa debugging."), _("\ When non-zero, Xtensa-specific debugging is enabled. \ Can be 1, 2, 3, or 4 indicating the level of debugging."), - NULL, - NULL, - &setdebuglist, &showdebuglist); + NULL, + NULL, + &setdebuglist, &showdebuglist); }