X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=gdb%2Fi386-go32-tdep.c;h=7a04a9647fa139faa2e0c3e1d9be61d3d009defd;hb=34dafe9f39e61de970c36ed636daa58e1caa386c;hp=df82c90e8661b4c04059673ea944795f32bc226b;hpb=e2882c85786571175a0b0bfc3bcd2f14620b1ea3;p=external%2Fbinutils.git

diff --git a/gdb/i386-go32-tdep.c b/gdb/i386-go32-tdep.c
index df82c90..7a04a96 100644
--- a/gdb/i386-go32-tdep.c
+++ b/gdb/i386-go32-tdep.c
@@ -1,6 +1,6 @@
 /* Target-dependent code for DJGPP/i386.
 
-   Copyright (C) 1988-2018 Free Software Foundation, Inc.
+   Copyright (C) 1988-2019 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -19,7 +19,7 @@
 
 #include "defs.h"
 #include "i386-tdep.h"
-#include "x86-xstate.h"
+#include "gdbsupport/x86-xstate.h"
 #include "target-descriptions.h"
 #include "osabi.h"
 
@@ -35,7 +35,7 @@ i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 
   /* DJGPP does not support the SSE registers.  */
   if (!tdesc_has_registers (info.target_desc))
-    tdep->tdesc = i386_target_description (X86_XSTATE_X87_MASK);
+    tdep->tdesc = i386_target_description (X86_XSTATE_X87_MASK, false);
 
   /* Native compiler is GCC, which uses the SVR4 register numbering
      even in COFF and STABS.  See the comment in i386_gdbarch_init,