X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=gas%2FChangeLog;h=c3ac4a1f8b1732207cef1478373c563fca9ed10c;hb=3cbabe78aa167e2d4def377c357d80179e955e43;hp=2dfbb661315d6feab475906ce643b95ad7566e76;hpb=b28d1bda54728d10ae189a323c343b6d76f94b8e;p=platform%2Fupstream%2Fbinutils.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 2dfbb66..c3ac4a1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,608 @@ +2014-12-19 Matthew Fortune + + * config/tc-mips.c (md_apply_fix): Apply alignment check + to the symbol and offset rather than *valP for + BFD_RELOC_MIPS_18_PCREL_S3. Also update the error message + for BFD_RELOC_MIPS_19_PCREL_S2. + +2014-11-18 Igor Zamyatin + + * config/tc-i386-intel.c (i386_operator): Remove last argument + from lex_got call. + * config/tc-i386.c (reloc): Remove bnd_prefix from parameters' + list. Return always BFD_RELOC_32_PCREL. + * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND. + * (output_jump): Update call to reloc accordingly. + * (output_interseg_jump): Likewise. + * (output_disp): Likewise. + * (output_imm): Likewise. + * (x86_cons_fix_new): Likewise. + * (lex_got): Remove bnd_prefix from parameters' list in macro and + declarations. Don't use BFD_RELOC_X86_64_PLT32_BND. + * (x86_cons): Update call to lex_got accordingly. + * (i386_immediate): Likewise. + * (i386_displacement): Likewise. + * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor + BFD_RELOC_X86_64_PC32_BND. + * (tc_gen_reloc): Likewise. + +2014-11-17 Philipp Tomsich + + * config/tc-aarch64.c (aarch64_cpus): Add "xgene2". + * doc/c-aarch64.texi: Document it. + +2014-11-17 Philipp Tomsich + + * config/tc-aarch64.c (aarch64_cpus): Add "xgene1". + * doc/c-aarch64.texi: Rename xgene-1 to xgene1. + +2014-11-18 Marcus Shawcroft + + Apply trunk patch: + * config/tc-aarch64.c (aarch64_cpus): Add CRC feature for + cortex-A53 and cortex-A57. + +2014-11-17 Nick Clifton + + Apply trunk patches: + + 2014-11-13 Nick Clifton + + PR binutils/17512 + * config/obj-coff.c (coff_obj_symbol_new_hook): Set the is_sym + field. + +2014-11-17 Ilya Tocar + + * config/tc-i386.c (cpu_arch): Add .avx512vbmi. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar + + * config/tc-i386.c (cpu_arch): Add .avx512ifma. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar + + * config/tc-i386.c (cpu_arch): Add .pcommit. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar + + * config/tc-i386.c (cpu_arch): Add .clwb. + * doc/c-i386.texi: Document it. + +2014-11-14 H.J. Lu + + * config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave* + items. + + * doc/c-i386.texi: Re-arrange avx512* and xsave*. Add + clflushopt and se1. Remove duplicated entries. + +2014-11-12 Alan Modra + + PR ld/17482 + * config/tc-i386.c (output_insn): Don't test x86_elf_abi when + not ELF. + +2014-11-11 Nick Clifton + + * po/uk.po: Updated Ukranian translation. + +2014-11-10 Matthew Fortune + + Apply trunk patch: + * config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6 + and INSN_ISA64R6 support. + +2014-11-07 H.J. Lu + + Apply trunk patch: + 2014-11-07 H.J. Lu + + PR ld/17482 + * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix + for structions with R_X86_64_GOTTPOFF relocation for x32 if needed. + +2014-11-03 Nick Clifton + + Apply trunk patch: + 2014-11-03 Nick Clifton + * config/tc-msp430.c (msp430_srcoperand): Fix range test for + 20-bit values. + +2014-10-30 Nick Clifton + + Apply trunk patches + 2014-10-30 Dr Philipp Tomsich + * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. + * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle + large alignments with a constant fragment size of + MAX_MEM_FOR_RS_ALIGN_CODE. + +2014-10-29 Nick Clifton + + * po/uk.po: New Ukranian translation. + +2014-10-28 Matthew Fortune + + Apply trunk patches + 2014-10-22 Matthew Fortune + * doc/as.texinfo: Update the MIPS FP ABI descriptions. + * doc/c-mips.texi: Spell check and correct throughout. + +2014-10-28 Matthew Fortune + + Apply trunk patches + 2014-10-21 Maciej W. Rozycki + * config/tc-mips.c (s_insn): Set file options. + +2014-10-28 Matthew Fortune + + Apply trunk patches + 2014-10-17 Matthew Fortune + * doc/c-mips.texi: Fix bad @value references. + +2014-10-28 Alan Modra + Apply trunk patches + 2014-10-18 Alan Modra + PR 17493 + * write.c (adjust_reloc_syms): Don't allow symbols in reg_section + to be reduced to reg_section section symbol. + * gas/config/tc-i386.c (i386_finalize_immediate): Reject all + reg_section immediates. + + 2014-10-15 Chen Gang + * config/tc-tic4x.c (md_assemble): Correct strncat size. + +2014-10-15 Tristan Gingold + + * configure: Regenerate. + +2014-10-14 Tristan Gingold + + * NEWS: Add marker for 2.25. + +2014-10-14 Alan Modra + + PR 17453 + * config/tc-i386.c (fits_in_signed_long): Use unsigned param and + expression to avoid signed overflow. + (fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word, + fits_in_signed_word, fits_in_unsigned_long): Similarly. + * expr.c (operand <'-'>): Avoid signed overflow. + * read.c (s_comm_internal): Likewise. + +2014-10-14 Alan Modra + + * config/tc-sparc.c (sparc_md_end): Fix unused variable warnings. + +2014-10-09 Jose E. Marchesi + + * config/tc-sparc.c (v9a_asr_table): Entry for %cps removed. + (sparc_arch_table): Remove the HWCAP_RANDOM, HWCAP_TRANS and + HWCAP_ASI_CACHE_SPARING from the architectures using them. + (HWS_V8): New define. + (HWS_V9): Likewise. + (HWS_VA): Likewise. + (HWS_VB): Likewise. + (HWS_VC): Likewise. + (HWS_VD): Likewise. + (HWS_VE): Likewise. + (HWS_VV): Likewise. + (sparc_arch): Use the HWS_* macros. Fix the `sparc4' architecture + to cover the HWCAP_ASI_BLK_INIT and HWCAP_IMA capabilities. + (hwcap_seen): Variable widened to 64 bits. + (hwcap_allowed): Likewise. + (sparc_arch): new field `hwcap2_allowed'. + (sparc_arch_table): provide hwcap2_allowed values for existing + archs. + (sparc_md_end): Add a HWCAPS2 object attribute to the elf object + in case any of the HWCAP2_* caps are used. + (sparc_ip): Take into account the new hwcaps2 bitmap to build the + list of seen/allowed hwcaps. + (get_hwcap_name): Argument widened to 64 bits to handle HWCAP2 + bits. + (HWS_VM): New define. + (HWS2_VM): Likewise. + (sparc_arch): New architectures `sparc5', `v9m' and `v8plusm'. + (v9a_asr_table): Add the %mwait (%asr28) ancillary state register + to the table. + (sparc_ip): Handle the %mcdper ancillary state register as an + operand. + (sparc_ip): Handle } arguments as fdrd floating point registers + (double) that are the same than frs1. + * doc/c-sparc.texi (Sparc-Opts): Document the -Av9e, -Av8pluse and + -xarch=v9e command line options. Also fix the description of the + -Av9v and -Av8plusv command line options. + Document the -Av9m, -Av8plusm,-Asparc5, -xarch=v9m and + -xarch=sparc5 command line options. + +2014-09-29 Terry Guo + + * as.c (create_obj_attrs_section): Move it and call it from ... + * write.c (create_obj_attrs_section): ... here. + (subsegs_finish_section): Refactored. + +2014-09-27 Alan Modra + + * dwarf2dbg.c (all_segs_hash): Delete. + (get_line_subseg): Delete last_seg, last_subseg, last_line_subseg. + Retrieve line_seg for section via seg_info. + * subsegs.h (segment_info_typet): Add dwarf2_line_seg. + +2014-09-23 H.J. Lu + + PR gas/17421 + * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded + instructions in 16-bit mode. + +2014-09-22 Alan Modra + + * config/tc-m68k.c (md_assemble): Add assert to work around + bogus trunk gcc warning. + * config/tc-pj.h (md_convert_frag): Warning fix. + * config/tc-xtensa.c (xg_assemble_vliw_tokens): Warning fix. + +2014-09-17 Tristan Gingold + + * config/tc-arm.c (move_or_literal_pool, add_to_lit_pool): Use + bfd_int64_t instead of int64_t. + +2014-09-16 Ilya Tocar + + * config/tc-i386.c (evexrcig): New. + (build_evex_prefix): Force rounding bits. + (OPTION_MEVEXRCIG): New. + (md_longopts): Add mevexrcig. + (md_parse_option): Handle OPTION_MEVEXRCIG. + (md_show_usage): Document mevexrcig. + * doc/c-i386.texi (mevexrcig): Document new option. + +2014-09-16 Kuan-Lin Chen + + * config/tc-nds32.c (nds32_fsrs, nds32_fdrs, nds32_gprs): Remove. + (relax_table): Add new relaxation pattern. + (do_pseudo_la_internal, do_pseudo_ls_bhw): Expand for PIC suffix. + (do_pseudo_move, do_pseudo_neg, do_pseudo_pushpopm): Fix. + (get_range_type, nds32_elf_record_fixup_exp, nds32_get_align, + nds32_elf_build_relax_relation, md_assemble, invalid_prev_frag, + nds32_relax_frag, md_estimate_size_before_relax): Adjust relaxation. + (relocation_table): Remove. + (relax_ls_table): Load-store relaxation pattern. + (hint_map): Define-use chain pattern. + (nds32_find_reloc_table, nds32_match_hint_insn): Analysis + relaxation pattern. + (nds32_parse_name): Parse PIC suffix. + * config/tc-nds32.h: Declare. + +2014-09-15 H.J. Lu + + * config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ... + (OPTION_OMIT_LOCK_PREFIX): This. + (md_longopts): Updated. + (md_parse_option): Likewise. + +2014-09-15 Andrew Bennett + Matthew Fortune + + * config/tc-mips.c (mips_nan2008): New static global. + (mips_flag_nan2008): Removed. + (LL_SC_FMT): New define. + (COP12_FMT): Updated. + (ISA_IS_R6): New define. + (ISA_HAS_64BIT_REGS): Add mips64r6. + (ISA_HAS_DROR): Likewise. + (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. + (ISA_HAS_ROR): Likewise. + (ISA_HAS_ODD_SINGLE_FPR): Likewise. + (ISA_HAS_MXHC1): Likewise. + (hilo_interlocks): Likewise. + (md_longopts): Likewise. + (ISA_HAS_LEGACY_NAN): New define. + (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. + (mips_ase): Add field rem_rev. + (mips_ases): Updated to add which ISA an ASE was removed in. + (mips_isa_rev): Add support for mips32r6 and mips64r6. + (mips_check_isa_supports_ase): Add support to check if an ASE + has been removed in the specified MIPS ISA revision. + (validate_mips_insn): Skip '-' character. + (macro_build): Likewise. + (mips_check_options): Prevent R6 working with fp32, mips16, + micromips, or branch relaxation. + (file_mips_check_options): Set R6 floating point registers to + 64 bit. Also deal with the nan2008 option. + (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV + and OP_NON_ZERO_REG. + (match_check_prev_operand): New static function. + (match_same_rs_rt_operand): New static function. + (match_non_zero_reg_operand): New static function. + (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV + and OP_NON_ZERO_REG. + (insns_between): Added case to deal with forbidden slots. + (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 + and BFD_RELOC_MIPS_26_PCREL_S2. + (match_insn): Add support for operands -A, -B, +' and +". Also + skip '-' character. + (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. + (md_parse_option): Add support for mips32r6 and mips64r6. Also + update the nan option handling. + (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2. + (mips_force_relocation): Prevent forced relaxation for MIPS r6. + (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (s_mipsset): Add support for mips32r6 and mips64r6. + (s_nan): Update to support the new nan2008 framework. + (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (mips_elf_final_processing): Updated to use the mips_nan2008. + (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. + (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref + macros for R6. + (mips_fix_adjustable): Make PC relative R6 relocations relative + to the symbol and not the section. + * configure.ac: Add support for mips32r6 and mips64r6. + * configure: Regenerate. + * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line + options. + * doc/as.texinfo: Likewise. + +2014-09-15 Matthew Fortune + + * tc-mips.c (check_fpabi): Move softfloat and singlefloat + checks higher. + +2014-09-12 Jose E. Marchesi + + * config/tc-sparc.c (sparc_ip): Update the set of allowed hwcaps + when bumping the current architecture. + (md_begin): Adjust the highetst architecture level also when a + specific architecture is not requested. + +2014-09-12 Andrew Bennett + + * configure.tgt: Add mips*-img-elf* target triple. + +2014-09-12 Alan Modra + + * config/tc-i386.c (match_template): Remove redundant "!!" testing + single-bit bitfields. + (build_modrm_byte): Don't compare single-bit bitfields to "1". + +2014-09-09 Kyrylo Tkachov + + * config/tc-arm.c (arm_cpus): Add cortex-a17. + +2014-09-03 Jiong Wang + + * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 + field. + +2014-09-03 Jiong Wang + + * config/tc-aarch64.c (parse_operands): Recognize PAIRREG. + (aarch64_features): Add entry for lse extension. + +2014-08-26 Jiong Wang + + * config/tc-arm.c (aeabi_set_public_attributes): Update selected_cpu + based on the info we got during parsing. + (arm_handle_align): Make sure the p2align expanding logic under thumb + unchanged. + +2014-08-26 Maciej W. Rozycki + + * config/tc-mips.c (macro) : Remove duplicate code and + jump to... + : ... here. Assert that !microMIPS. + +2014-08-26 Jan-Benedict Glaw + + * config/tc-moxie.h (md_convert_frag): Silence warning. + +2014-08-22 Richard Henderson + + * config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix + register number for vector register types. + * config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4. + (DWARF2_CIE_DATA_ALIGNMENT): Set to -8. + +2014-08-22 Maciej W. Rozycki + + * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE + flag if both the processor and opcode flags match. + +2014-08-22 Maciej W. Rozycki + + * config/tc-arm.c (add_to_lit_pool): Preinitialize `imm1'. + +2014-08-20 Maciej W. Rozycki + + * dw2gencfi.c (make_debug_seg): Replace leading spaces with tabs. + (dot_cfi_val_encoded_addr, output_cfi_insn): Likewise. + (output_cie, cfi_change_reg_numbers, cfi_finish): Likewise. + +2014-08-20 Kyrylo Tkachov + + * config/tc-arm.c (parse_ifimm_zero): New function. + (enum operand_parse_code): Add OP_RSVD_FI0 value. + (parse_operands): Handle OP_RSVD_FI0. + (asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe. + +2014-08-20 Alan Modra + + * Makefile.am: Typo fix. + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2014-08-19 Andreas Tobler + + * Makefile.am: Add FreeBSD ARM support. + * Mafefile.in: Regenerate. + * configure.tgt: Add FreeBSD ARM support. + * config/te-armfbsdeabi.h: New file. + * config/te-armfbsdvfp.h: Likewise. + +2014-08-19 Alan Modra + + * configure: Regenerate. + +2014-08-18 Nick Clifton + + * config/tc-rl78.c (md_apply_fix): Correct handling of small sized + RELOC_RL78_DIFF fixups. + +2014-08-18 Alan Modra + + * read.c (parse_mri_cons): Warning fix. + +2014-08-14 Alan Modra + + * configure.ac: Move ACX_LARGEFILE after LT_INIT. + * config.in: Regenerate. + * configure: Regenerate. + +2014-08-06 Ilya Tocar + + * config/tc-i386.c (omit_lock_prefix): New. + (output_insn): Omit lock prefix if omit_lock_prefix is true. + (OPTION_omit_lock_prefix): New. + (md_longopts): Add momit-lock-prefix. + (md_parse_option): Handle momit-lock-prefix. + (md_show_usage): Add momit-lock-prefix=[no|yes]. + * doc/c-i386.texi (momit-lock-prefix): Document. + +2014-08-01 Takashi Yoshii + + PR 10378 + * config/tc-sh.c (tc_gen_reloc): Fix initialization of addend in + SWITCH_TABLE case. + +2014-07-29 Matthew Fortune + + * config/tc-mips.c: Rename INSN_LOAD_COPROC_DELAY to INSN_LOAD_COPROC + and INSN_COPROC_MOVE_DELAY to INSN_COPROC_MOVE throughout. + +2014-07-29 Matthew Fortune + + * config/tc-mips.c (mips_flags_frag): New static global. + (struct mips_set_options): Add oddspreg field. + (file_mips_opts, mips_opts): Initialize oddspreg. + (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and + Loongson-3a. + (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg + and -mno-odd-spreg options. + (md_begin): Create .MIPS.abiflags section. + (fpabi_incompatible_with, fpabi_requires): New static function. + (check_fpabi): Likewise. + (mips_check_options): Handle fp=xx and oddspreg restrictions. + (file_mips_check_options): Set oddspreg by default for fp=xx. + (mips_oddfpreg_ok): Re-write function. + (check_regno): Check odd numbered registers regardless of FPR size. + For fp != 32 use as_bad instead of as_warn. + (match_float_constant): Rewrite check regarding FP register width. Add + support for generating constants when MXHC1 is present. Handle fp=xx + to comply with the ABI. + (macro): Update M_LI_DD similarly to match_float_constant. Generate + MTHC1 when available. Check that correct code can be generated for + fp=xx and fp=64 ABIs. + (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg + options. + (mips_convert_ase_flags): New static function. + (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64 + to determine when to add the EF_MIPS_FP64 flag. Populate the + .MIPS.abiflags section. + (md_mips_end): Update .gnu_attribute based on command line and .module + as applicable. Use check_fpabi to ensure .gnu.attribute and command + line/.module options are consistent. + * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new + -mfpxx, -modd-spreg and -mno-odd-spreg options. + * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg, + gnu_attribute values and FP ABIs. + +2014-07-27 Joel Sherrill + + Add RTEMS target support and simplify matching + + * gas/configure.tgt (or1k*-*-rtems*): Ensure a match. + (or1k*-*-*): Use or1k* to match or1knd and or1kZ. + +2014-07-27 Anthony Green + + * configure.tgt (generic_target): Add moxie-*-moxiebox* + * config/tc-moxie.c: Remove moxie_target_format. + (md_begin): Set default target_big_endian. + * config/tc-moxie.h: Only set TARGET_BYTES_BIG_ENDIAN if unset. + (TARGET_FORMAT): Set based on target_big_endian. + +2014-07-26 Alan Modra + + * config/bfin-parse.y: Don't include obstack.h. + * config/obj-aout.c: Likewise. + * config/obj-coff.c: Likewise. + * config/obj-som.c: Likewise. + * config/tc-bfin.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-rl78.c: Likewise. + * config/tc-rx.c: Likewise. + * config/tc-tic4x.c: Likewise. + * expr.c: Likewise. + * listing.c: Likewise. + * config/obj-elf.c (elf_file_symbol): Make name_length a size_t. + * config/tc-aarch64.c (symbol_locate): Likewise. + * config/tc-arm.c (symbol_locate): Likewise. + * config/tc-mmix.c (mmix_handle_mmixal): Make len_0 a size_t. + * config/tc-score.c (s3_build_score_ops_hsh): Make len a size_t. + (s3_build_dependency_insn_hsh): Likewise. + * config/tc-score7.c (s7_build_score_ops_hsh): Likewise. + (s7_build_dependency_insn_hsh): Likewise. + * frags.c (frag_grow): Make parameter a size_t, and use size_t locals. + (frag_new): Make parameter a size_t. + (frag_var_init): Make max_chars and var parameters size_t. + (frag_var, frag_variant): Likewise. + (frag_room): Return a size_t. + (frag_align_pattern): Make n_fill parameter a size_t. + * frags.h: Update function prototypes. + * symbols.c (save_symbol_name): Make name_length a size_t. + +2014-07-22 Sergey Guriev + Alexander Ivchenko + Maxim Kuznetsov + Sergey Lega + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS. + * doc/c-i386.texi: Document avx512dq/.avx512dq. + +2014-07-22 Sergey Guriev + Alexander Ivchenko + Maxim Kuznetsov + Sergey Lega + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS. + * doc/c-i386.texi: Document avx512bw/.avx512bw. + 2014-07-22 Sergey Guriev Alexander Ivchenko Maxim Kuznetsov