X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fwatchdog%2FKconfig;h=6d5c4fcfebb0f472e78aa542c8e2068c37944aa6;hb=8d1fc6fb89826efb6bbbedb57862496e18737877;hp=cb4da2e3cf8804ac0b38a4e8b022084ed8c4c7b3;hpb=2b18b89156335bf1f0d84f81d3597762bc48c61d;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index cb4da2e..6d5c4fc 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -49,6 +49,7 @@ config ULP_WATCHDOG
 config DESIGNWARE_WATCHDOG
 	bool "Designware watchdog timer support"
 	select HW_WATCHDOG if !WDT
+	default y if WDT && ROCKCHIP_RK3399
 	help
 	  Enable this to support Designware Watchdog Timer IP, present e.g.
 	  on Altera SoCFPGA SoCs.
@@ -162,6 +163,15 @@ config WDT_SANDBOX
 	  can be probed and supports all of the methods of WDT, but does not
 	  really do anything.
 
+config WDT_SBSA
+	bool "SBSA watchdog timer support"
+	depends on WDT
+	help
+	   Select this to enable SBSA watchdog timer.
+	   This driver can operate ARM SBSA Generic Watchdog as a single stage.
+	   In the single stage mode, when the timeout is reached, your system
+	   will be reset by WS1. The first signal (WS0) is ignored.
+
 config WDT_SP805
 	bool "SP805 watchdog timer support"
 	depends on WDT
@@ -185,6 +195,15 @@ config XILINX_TB_WATCHDOG
 	  Select this to enable Xilinx Axi watchdog timer, which can be found on some
 	  Xilinx Microblaze Platforms.
 
+config WDT_XILINX
+	bool "Xilinx window watchdog timer support"
+	depends on WDT && ARCH_VERSAL
+	select REGMAP
+	imply WATCHDOG
+	help
+	  Select this to enable Xilinx window watchdog timer, which can be found on
+	  Xilinx Versal Platforms.
+
 config WDT_TANGIER
 	bool "Intel Tangier watchdog timer support"
 	depends on WDT && INTEL_MID