X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fwatchdog%2FKconfig;h=646663528a66ace0460698fc9c8f840cac423968;hb=fe3a77cb157a6210d8036845f5f80ea67c183563;hp=f90f0ca02bce5ba745c83ae194913ae48e3c54b9;hpb=6d35c24892c9d2f3eb03bee57c77cc9a3560c134;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index f90f0ca..6466635 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -3,6 +3,7 @@ menu "Watchdog Timer Support" config WATCHDOG bool "Enable U-Boot watchdog reset" depends on !HW_WATCHDOG + select CYCLIC help This option enables U-Boot watchdog support where U-Boot is using watchdog_reset function to service watchdog device in U-Boot. Enable @@ -29,6 +30,8 @@ config WATCHDOG_TIMEOUT_MSECS default 128000 if ARCH_MX7 || ARCH_VF610 default 30000 if ARCH_SOCFPGA default 16000 if ARCH_SUNXI + default 5376 if ULP_WATCHDOG + default 15000 if ARCH_BCM283X default 60000 help Watchdog timeout in msec @@ -64,8 +67,8 @@ config ULP_WATCHDOG config DESIGNWARE_WATCHDOG bool "Designware watchdog timer support" - select HW_WATCHDOG if !WDT - default y if WDT && ROCKCHIP_RK3399 + depends on WDT + default y if ROCKCHIP_RK3399 help Enable this to support Designware Watchdog Timer IP, present e.g. on Altera SoCFPGA SoCs. @@ -74,6 +77,7 @@ config WDT bool "Enable driver model for watchdog timer drivers" depends on DM imply WATCHDOG + select CYCLIC help Enable driver model for watchdog timer. At the moment the API is very simple and only supports four operations: @@ -128,8 +132,8 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" - depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + depends on WDT && (ARCH_BMIPS || BCM6856 || \ + BCM6858 || BCM63158 || BCM6855) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized. @@ -167,12 +171,42 @@ config WDT_GPIO doc/device-tree-bindings/watchdog/gpio-wdt.txt for information on how to describe the watchdog in device tree. -config WDT_MPC8xx - bool "MPC8xx watchdog timer support" - depends on WDT && MPC8xx - select HW_WATCHDOG +config WDT_MAX6370 + bool "MAX6370 watchdog timer support" + depends on WDT + select DM_GPIO help - Select this to enable mpc8xx watchdog timer + Select this to enable max6370 watchdog timer. + +config WDT_MESON_GXBB + bool "Amlogic watchdog timer support" + depends on WDT + help + Select this to enable Meson watchdog timer, + which can be found on some Amlogic platforms. + +config WDT_MPC8xxx + bool "MPC8xxx watchdog timer support" + depends on WDT && (MPC8xx || MPC83xx) + help + Select this to enable mpc8xxx watchdog timer + +config WDT_MPC8xxx_BME + bool "Enable MPC8xx Bus Monitoring" + depends on WDT_MPC8xxx && MPC8xx + help + Select this to enable mpc8xx Bus Monitor. + +config WDT_MPC8xxx_BMT + int "MPC8xx Bus Monitor Timing" if WDT_MPC8xxx_BME + range 0 255 + default 255 + depends on WDT_MPC8xxx + help + Bus monitor timing. Defines the timeout period, in 8 system clock + resolution, for the bus monitor. + + Maximum timeout is 2,040 clocks (255 x 8). config WDT_MT7620 bool "MediaTek MT7620 watchdog timer support" @@ -183,7 +217,7 @@ config WDT_MT7620 config WDT_MT7621 bool "MediaTek MT7621 watchdog timer support" - depends on WDT && SOC_MT7628 + depends on WDT && (SOC_MT7621 || SOC_MT7628) help Select this to enable Ralink / Mediatek watchdog timer, which can be found on some MediaTek chips. @@ -196,15 +230,22 @@ config WDT_MTK The watchdog timer is stopped when initialized. It performs full SoC reset. +config WDT_NPCM + bool "Nuvoton watchdog timer support" + depends on WDT && ARCH_NPCM + help + This enables Nuvoton npcm7xx/npcm8xx watchdog timer driver, + The watchdog timer is stopped when initialized. + It performs full SoC reset. + config WDT_OCTEONTX - bool "OcteonTX core watchdog support" - depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2) + bool "Octeon core watchdog support" + depends on WDT && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) default y imply WATCHDOG help - This enables OcteonTX watchdog driver, which can be - found on OcteonTX/TX2 chipsets and inline with driver model. - Only supports watchdog reset. + This enables the Octeon watchdog driver, which can be found on + various Octeon parts such as Octeon II/III and OcteonTX/TX2. config WDT_OMAP3 bool "TI OMAP watchdog timer support" @@ -257,6 +298,14 @@ config WDT_SANDBOX can be probed and supports all of the methods of WDT, but does not really do anything. +config WDT_ALARM_SANDBOX + bool "Enable SIGALRM-based Watchdog Timer support for Sandbox" + depends on SANDBOX && WDT + help + Enable support for a SIGALRM-based watchdog timer in Sandbox. This is + a watchdog device based on the host OS' alarm() function, which will + kill the sandbox with SIGALRM unless properly maintained. + config WDT_SBSA bool "SBSA watchdog timer support" depends on WDT @@ -295,6 +344,14 @@ config WDT_SUNXI help Enable support for the watchdog timer in Allwinner sunxi SoCs. +config WDT_BCM2835 + bool "Broadcom 2835 watchdog timer support" + depends on WDT && ARCH_BCM283X + default y + help + Enable support for the watchdog timer in Broadcom 283X SoCs such + as Raspberry Pi boards. + config XILINX_TB_WATCHDOG bool "Xilinx Axi watchdog timer support" depends on WDT @@ -320,6 +377,14 @@ config WDT_TANGIER Intel Tangier SoC. If you're using a board with Intel Tangier SoC, say Y here. +config WDT_ARM_SMC + bool "ARM SMC watchdog timer support" + depends on WDT && ARM_SMCCC + imply WATCHDOG + help + Select this to enable Arm SMC watchdog timer. This watchdog will manage + a watchdog based on ARM SMCCC communication. + config SPL_WDT bool "Enable driver model for watchdog timer drivers in SPL" depends on SPL_DM @@ -327,4 +392,11 @@ config SPL_WDT Enable driver model for watchdog timer in SPL. This is similar to CONFIG_WDT in U-Boot. +config WDT_FTWDT010 + bool "Faraday Technology ftwdt010 watchdog timer support" + depends on WDT + imply WATCHDOG + help + Faraday Technology ftwdt010 watchdog is an architecture independent + watchdog. It is usually used in SoC chip design. endmenu