X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fusb%2Fdwc3%2Fcore.h;h=2b4c51a406192f13ccc2c68c7344fc944796a3ce;hb=3da0291ba9b4a429ed9226569c9014f5c7e13ac3;hp=bff53e072b959d033c71bc9389013090c95ed7b1;hpb=6b7ebff00190649d2136b34f6feebc0dbe85bfdc;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index bff53e0..2b4c51a 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -17,6 +17,7 @@ #ifndef __DRIVERS_USB_DWC3_CORE_H #define __DRIVERS_USB_DWC3_CORE_H +#include #include #include @@ -162,18 +163,14 @@ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) -#define DWC3_GUSB2PHYCFG_PHYIF BIT(3) - -/* Global USB2 PHY Configuration Mask */ -#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << 10) - -/* Global USB2 PHY Configuration Offset */ -#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET 10 - -#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \ - DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET) -#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \ - DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET) +#define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) +#define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1) +#define DWC3_GUSB2PHYCFG_USBTRDTIM(n) ((n) << 10) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK DWC3_GUSB2PHYCFG_USBTRDTIM(0xf) +#define USBTRDTIM_UTMI_8_BIT 9 +#define USBTRDTIM_UTMI_16_BIT 5 +#define UTMI_PHYIF_16_BIT 1 +#define UTMI_PHYIF_8_BIT 0 /* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) @@ -825,6 +822,7 @@ struct dwc3 { unsigned rx_detect_poll_quirk:1; unsigned dis_u3_susphy_quirk:1; unsigned dis_u2_susphy_quirk:1; + unsigned dis_del_phy_power_chg_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2;