X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fram%2Frockchip%2Fdmc-rk3368.c;h=75e2e9969b3099ec5dde4d97e4a91d2e866acc0e;hb=83d290c56fab2d38cd1ab4c4cc7099559c1d5046;hp=ca7b1ff0c841517cb84e2417055938ab5fbc1cc1;hpb=5619295995e3262bb5770e8b5e945ffdc5442145;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index ca7b1ff..75e2e99 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
@@ -20,8 +19,6 @@
 #include <asm/arch/sdram.h>
 #include <asm/arch/sdram_common.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct dram_info {
 	struct ram_info info;
 	struct clk ddr_clk;
@@ -230,7 +227,7 @@ static int memory_init(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: POWER_UP_START did not complete in %ld ms\n",
+			pr_err("%s: POWER_UP_START did not complete in %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -422,7 +419,7 @@ static int dfi_cfg(struct rk3368_ddr_pctl *pctl)
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: DFI init did not complete within %ld ms\n",
+			pr_err("%s: DFI init did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -457,7 +454,7 @@ static int pctl_calc_timings(struct rk3368_sdram_params *params,
 	u32 tfaw_as_ps;
 
 	if (params->ddr_speed_bin != DDR3_1600K) {
-		error("%s: unimplemented DDR3 speed bin %d\n",
+		pr_err("%s: unimplemented DDR3 speed bin %d\n",
 		      __func__, params->ddr_speed_bin);
 		return -1;
 	}
@@ -585,7 +582,7 @@ static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: did not complete within %ld ms\n",
+			pr_err("%s: did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -625,7 +622,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (col == 8) {
-		error("%s: col detect error\n", __func__);
+		pr_err("%s: col detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -644,7 +641,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (row == 11) {
-		error("%s: row detect error\n", __func__);
+		pr_err("%s: row detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -764,7 +761,7 @@ static int msch_niu_config(struct rk3368_msch *msch,
 		}
 	}
 
-	error("%s: ddrconf (NIU config) not found\n", __func__);
+	pr_err("%s: ddrconf (NIU config) not found\n", __func__);
 	return -EINVAL;
 }
 
@@ -893,18 +890,11 @@ static int conv_of_platdata(struct udevice *dev)
 {
 	struct rk3368_sdram_params *plat = dev_get_platdata(dev);
 	struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
-	int ret;
 
 	plat->ddr_freq = of_plat->rockchip_ddr_frequency;
 	plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
 	plat->memory_schedule = of_plat->rockchip_memory_schedule;
 
-	ret = regmap_init_mem_platdata(dev, of_plat->reg,
-				       ARRAY_SIZE(of_plat->reg) / 2,
-				       &plat->map);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 #endif
@@ -933,8 +923,8 @@ static int rk3368_dmc_probe(struct udevice *dev)
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 
 #ifdef CONFIG_TPL_BUILD
-	pctl = regmap_get_range(plat->map, 0);
-	ddrphy = regmap_get_range(plat->map, 1);
+	pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0];
+	ddrphy = (struct rk3368_ddrphy *)plat->of_plat.reg[2];
 	msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);