X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fpinctrl%2Fmvebu%2Fpinctrl-mvebu.c;h=146f5c6e426c17de2b149b0cce13b7bb9ccce120;hb=7a1a01c6029039e4fa6aa185cdbbf9a357eecba7;hp=80f0dfaf91b0c3a089cc90165c7a05c3814c013e;hpb=576a085c1d224b8a5a3ccf5c4114d07a1f695f20;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index 80f0dfa..146f5c6 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (C) 2016 Marvell International Ltd.
- *
- * SPDX-License-Identifier:	GPL-2.0
  * https://spdx.org/licenses
  */
 
@@ -10,15 +9,57 @@
 #include <fdtdec.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/arch-armada8k/soc-info.h>
+#include <linux/bitops.h>
 #include "pinctrl-mvebu.h"
 
+#define AP_EMMC_PHY_CTRL_REG		0x100
+#define CP_EMMC_PHY_CTRL_REG		0x424
+#define EMMC_PHY_CTRL_SDPHY_EN		BIT(0)
+
+#define AP806_EMMC_CLK_PIN_ID		0
+#define AP806_EMMC_CLK_FUNC		0x1
+#define CP110_EMMC_CLK_PIN_ID		56
+#define CP110_EMMC_CLK_FUNC		0xe
+
 DECLARE_GLOBAL_DATA_PTR;
 
+/* mvebu_pinctl_emmc_set_mux: configure sd/mmc PHY mux
+ * To enable SDIO/eMMC in Armada-APN806/CP110, need to configure PHY mux.
+ * eMMC/SD PHY register responsible for muxing between MPPs and SD/eMMC
+ * controller:
+ * - Bit0 enabled SDIO/eMMC PHY is used as a MPP muxltiplexer,
+ * - Bit0 disabled SDIO/eMMC PHY is connected to SDIO/eMMC controller
+ * If pin function is set to eMMC/SD, then configure the eMMC/SD PHY
+ * muxltiplexer register to be on SDIO/eMMC controller
+ */
+void mvebu_pinctl_emmc_set_mux(struct udevice *dev, u32 pin, u32 func)
+{
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	struct mvebu_pinctrl_priv *priv = dev_get_priv(dev);
+
+	if (!fdt_node_check_compatible(blob, node, "marvell,ap806-pinctrl")) {
+		if ((pin == AP806_EMMC_CLK_PIN_ID) &&
+		    (func == AP806_EMMC_CLK_FUNC)) {
+			clrbits_le32(priv->base_reg + AP_EMMC_PHY_CTRL_REG,
+				     EMMC_PHY_CTRL_SDPHY_EN);
+		}
+	} else if (!fdt_node_check_compatible(blob, node,
+					"marvell,armada-8k-cpm-pinctrl")) {
+		if ((pin == CP110_EMMC_CLK_PIN_ID) &&
+		    (func == CP110_EMMC_CLK_FUNC)) {
+			clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG,
+				     EMMC_PHY_CTRL_SDPHY_EN);
+		}
+	}
+}
+
 /*
  * mvebu_pinctrl_set_state: configure pin functions.
  * @dev: the pinctrl device to be configured.
@@ -48,9 +89,16 @@ int mvebu_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 
 	function = fdtdec_get_int(blob, node, "marvell,function", 0xff);
 
+	/*
+	 * Check if setup of PHY mux is needed for this pins group.
+	 * Only the first pin id in array is tested, all the rest use the same
+	 * pin function.
+	 */
+	mvebu_pinctl_emmc_set_mux(dev, pin_arr[0], function);
+
 	for (i = 0; i < pin_count; i++) {
-	int reg_offset;
-	int field_offset;
+		int reg_offset;
+		int field_offset;
 		int pin = pin_arr[i];
 
 		if (function > priv->max_func) {
@@ -97,6 +145,14 @@ static int mvebu_pinctrl_set_state_all(struct udevice *dev,
 		return -EINVAL;
 	}
 
+	/* Check if setup of PHY mux is needed for this pins group. */
+	if (priv->pin_cnt < CP110_EMMC_CLK_PIN_ID)
+		mvebu_pinctl_emmc_set_mux(dev, AP806_EMMC_CLK_PIN_ID,
+					  func_arr[AP806_EMMC_CLK_PIN_ID]);
+	else
+		mvebu_pinctl_emmc_set_mux(dev, CP110_EMMC_CLK_PIN_ID,
+					  func_arr[CP110_EMMC_CLK_PIN_ID]);
+
 	for (pin = 0; pin < priv->pin_cnt; pin++) {
 		int reg_offset;
 		int field_offset;
@@ -137,8 +193,8 @@ int mvebu_pinctl_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	priv->base_reg = dev_get_addr_ptr(dev);
-	if (priv->base_reg == (void *)FDT_ADDR_T_NONE) {
+	priv->base_reg = dev_read_addr_ptr(dev);
+	if (!priv->base_reg) {
 		debug("%s: Failed to get base address\n", __func__);
 		return -EINVAL;
 	}
@@ -162,10 +218,10 @@ static struct pinctrl_ops mvebu_pinctrl_ops = {
 
 static const struct udevice_id mvebu_pinctrl_ids[] = {
 	{ .compatible = "marvell,mvebu-pinctrl" },
-	{ .compatible = "marvell,armada-ap806-pinctrl" },
-	{ .compatible = "marvell,a70x0-pinctrl" },
-	{ .compatible = "marvell,a80x0-cp0-pinctrl" },
-	{ .compatible = "marvell,a80x0-cp1-pinctrl" },
+	{ .compatible = "marvell,ap806-pinctrl" },
+	{ .compatible = "marvell,armada-7k-pinctrl" },
+	{ .compatible = "marvell,armada-8k-cpm-pinctrl" },
+	{ .compatible = "marvell,armada-8k-cps-pinctrl" },
 	{ }
 };