X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fperf%2Friscv_pmu_sbi.c;h=5e29226d8dc8197f31b8c52c05069dff98e42289;hb=46cea3ea9d804a8644b544e9e5f0326bd4a706da;hp=cd8a2b9efd7874224a7dd34b4eeb87f58acf8b74;hpb=163de2e4bc2cd939bb937d3ff12ff685b0cb32f7;p=platform%2Fkernel%2Flinux-starfive.git

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index cd8a2b9..5e29226 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -51,8 +51,9 @@ static const struct attribute_group *riscv_pmu_attr_groups[] = {
 	NULL,
 };
 
-/* Allow user mode access by default */
-static int sysctl_perf_user_access __read_mostly = SYSCTL_USER_ACCESS;
+/* WORKAROUND: Allow legacy mode by default when SOC is starfive */
+static int sysctl_perf_user_access __read_mostly = SYSCTL_LEGACY;
+
 
 /*
  * RISC-V doesn't have heterogeneous harts yet. This need to be part of