X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fpcmcia%2Fmpc8xx_pcmcia.c;h=ea88494180626fba54c7986d64d4c3253c399dee;hb=5d2a5ef712914fe1c3edfcde78134dc4dc83f461;hp=373258383810b9d886c25adf3a8b67ec39d22b2e;hpb=c829ff2e3d1bec9b2019480d82638149327db99e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c
index 3732583..ea88494 100644
--- a/drivers/pcmcia/mpc8xx_pcmcia.c
+++ b/drivers/pcmcia/mpc8xx_pcmcia.c
@@ -58,7 +58,7 @@ static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
 
 /* -------------------------------------------------------------------- */
 
-#if	defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
+#if	defined(CONFIG_LWMON)
 #define	CONFIG_SYS_PCMCIA_TIMING	(	PCMCIA_SHT(9)	\
 				|	PCMCIA_SST(3)	\
 				|	PCMCIA_SL(12))
@@ -211,16 +211,6 @@ static u_int m8xx_get_graycode(u_int size)
 
 #if	0
 
-#if	defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
-
-/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
- * SYPCR is write once only, therefore must the slowest memory be faster
- * than the bus monitor or we will get a machine check due to the bus timeout.
- */
-#undef	PCMCIA_BMT_LIMIT
-#define	PCMCIA_BMT_LIMIT (6*8)
-#endif
-
 static u_int m8xx_get_speed(u_int ns, u_int is_io)
 {
 	u_int reg, clocks, psst, psl, psht;