X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci-uclass.c;h=6093072814a5bfb44a7fb09ac5b5e149b48c3f1a;hb=41575d8e4c334df148c4cdd7c40cc825dc0fcaa1;hp=0c52337f33a2315a435109638f09aa4783f2b3ab;hpb=1d6edcbfed2af33c748f2beb399810a0441888da;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 0c52337..6093072 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -7,6 +7,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -14,6 +17,7 @@ #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) #include #endif +#include #include "pci_internal.h" DECLARE_GLOBAL_DATA_PTR; @@ -43,11 +47,24 @@ struct udevice *pci_get_controller(struct udevice *dev) return dev; } -pci_dev_t dm_pci_get_bdf(struct udevice *dev) +pci_dev_t dm_pci_get_bdf(const struct udevice *dev) { struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); struct udevice *bus = dev->parent; + /* + * This error indicates that @dev is a device on an unprobed PCI bus. + * The bus likely has bus=seq == -1, so the PCI_ADD_BUS() macro below + * will produce a bad BDF> + * + * A common cause of this problem is that this function is called in the + * ofdata_to_platdata() method of @dev. Accessing the PCI bus in that + * method is not allowed, since it has not yet been probed. To fix this, + * move that access to the probe() method of @dev instead. + */ + if (!device_active(bus)) + log_err("PCI: Device '%s' on unprobed bus '%s'\n", dev->name, + bus->name); return PCI_ADD_BUS(bus->seq, pplat->devfn); } @@ -111,7 +128,7 @@ static void pci_dev_find_ofnode(struct udevice *bus, phys_addr_t bdf, } }; -int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn, +int pci_bus_find_devfn(const struct udevice *bus, pci_dev_t find_devfn, struct udevice **devp) { struct udevice *dev; @@ -336,7 +353,7 @@ int dm_pci_write_config32(struct udevice *dev, int offset, u32 value) return dm_pci_write_config(dev, offset, value, PCI_SIZE_32); } -int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset, +int pci_bus_read_config(const struct udevice *bus, pci_dev_t bdf, int offset, unsigned long *valuep, enum pci_size_t size) { struct dm_pci_ops *ops; @@ -360,10 +377,10 @@ int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep, return pci_bus_read_config(bus, bdf, offset, valuep, size); } -int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep, - enum pci_size_t size) +int dm_pci_read_config(const struct udevice *dev, int offset, + unsigned long *valuep, enum pci_size_t size) { - struct udevice *bus; + const struct udevice *bus; for (bus = dev; device_is_on_pci_bus(bus);) bus = bus->parent; @@ -410,7 +427,7 @@ int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep) return 0; } -int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep) +int dm_pci_read_config8(const struct udevice *dev, int offset, u8 *valuep) { unsigned long value; int ret; @@ -423,7 +440,7 @@ int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep) return 0; } -int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep) +int dm_pci_read_config16(const struct udevice *dev, int offset, u16 *valuep) { unsigned long value; int ret; @@ -436,7 +453,7 @@ int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep) return 0; } -int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep) +int dm_pci_read_config32(const struct udevice *dev, int offset, u32 *valuep) { unsigned long value; int ret; @@ -522,6 +539,9 @@ int pci_auto_config_devices(struct udevice *bus) int ret; debug("%s: device %s\n", __func__, dev->name); + if (dev_of_valid(dev) && + dev_read_bool(dev, "pci,no-autoconfig")) + continue; ret = dm_pciauto_config_device(dev); if (ret < 0) return ret; @@ -538,8 +558,9 @@ int pci_auto_config_devices(struct udevice *bus) } int pci_generic_mmap_write_config( - struct udevice *bus, - int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + const struct udevice *bus, + int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset, + void **addrp), pci_dev_t bdf, uint offset, ulong value, @@ -566,8 +587,9 @@ int pci_generic_mmap_write_config( } int pci_generic_mmap_read_config( - struct udevice *bus, - int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + const struct udevice *bus, + int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset, + void **addrp), pci_dev_t bdf, uint offset, ulong *valuep, @@ -599,10 +621,19 @@ int dm_pci_hose_probe_bus(struct udevice *bus) { int sub_bus; int ret; + int ea_pos; + u8 reg; debug("%s\n", __func__); - sub_bus = pci_get_bus_max() + 1; + ea_pos = dm_pci_find_capability(bus, PCI_CAP_ID_EA); + if (ea_pos) { + dm_pci_read_config8(bus, ea_pos + sizeof(u32) + sizeof(u8), + ®); + sub_bus = reg; + } else { + sub_bus = pci_get_bus_max() + 1; + } debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name); dm_pciauto_prescan_setup_bridge(bus, sub_bus); @@ -612,12 +643,15 @@ int dm_pci_hose_probe_bus(struct udevice *bus) ret); return ret; } - if (sub_bus != bus->seq) { - printf("%s: Internal error, bus '%s' got seq %d, expected %d\n", - __func__, bus->name, bus->seq, sub_bus); - return -EPIPE; + + if (!ea_pos) { + if (sub_bus != bus->seq) { + debug("%s: Internal error, bus '%s' got seq %d, expected %d\n", + __func__, bus->name, bus->seq, sub_bus); + return -EPIPE; + } + sub_bus = pci_get_bus_max(); } - sub_bus = pci_get_bus_max(); dm_pciauto_postscan_setup_bridge(bus, sub_bus); return sub_bus; @@ -675,7 +709,13 @@ static int pci_find_and_bind_driver(struct udevice *parent, find_id->vendor, find_id->device); /* Determine optional OF node */ - pci_dev_find_ofnode(parent, bdf, &node); + if (ofnode_valid(dev_ofnode(parent))) + pci_dev_find_ofnode(parent, bdf, &node); + + if (ofnode_valid(node) && !ofnode_is_available(node)) { + debug("%s: Ignoring disabled device\n", __func__); + return -EPERM; + } start = ll_entry_start(struct pci_driver_entry, pci_driver_entry); n_ents = ll_entry_count(struct pci_driver_entry, pci_driver_entry); @@ -710,8 +750,8 @@ static int pci_find_and_bind_driver(struct udevice *parent, * find another driver. For now this doesn't seem * necesssary, so just bind the first match. */ - ret = device_bind_ofnode(parent, drv, drv->name, NULL, - node, &dev); + ret = device_bind(parent, drv, drv->name, NULL, node, + &dev); if (ret) goto error; debug("%s: Match found: %s\n", __func__, drv->name); @@ -759,6 +799,7 @@ int pci_bind_bus_devices(struct udevice *bus) ulong header_type; pci_dev_t bdf, end; bool found_multi; + int ari_off; int ret; found_multi = false; @@ -774,20 +815,23 @@ int pci_bind_bus_devices(struct udevice *bus) found_multi = false; if (PCI_FUNC(bdf) && !found_multi) continue; + /* Check only the first access, we don't expect problems */ - ret = pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE, - &header_type, PCI_SIZE_8); + ret = pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor, + PCI_SIZE_16); if (ret) goto error; - pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor, - PCI_SIZE_16); + if (vendor == 0xffff || vendor == 0x0000) continue; + pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE, + &header_type, PCI_SIZE_8); + if (!PCI_FUNC(bdf)) found_multi = header_type & 0x80; - debug("%s: bus %d/%s: found device %x, function %d\n", __func__, + debug("%s: bus %d/%s: found device %x, function %d", __func__, bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device, PCI_SIZE_16); @@ -797,6 +841,7 @@ int pci_bind_bus_devices(struct udevice *bus) /* Find this device in the device tree */ ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev); + debug(": find ret=%d\n", ret); /* If nothing in the device tree, bind a device */ if (ret == -ENODEV) { @@ -828,6 +873,31 @@ int pci_bind_bus_devices(struct udevice *bus) pplat->vendor = vendor; pplat->device = device; pplat->class = class; + + if (IS_ENABLED(CONFIG_PCI_ARID)) { + ari_off = dm_pci_find_ext_capability(dev, + PCI_EXT_CAP_ID_ARI); + if (ari_off) { + u16 ari_cap; + + /* + * Read Next Function number in ARI Cap + * Register + */ + dm_pci_read_config16(dev, ari_off + 4, + &ari_cap); + /* + * Update next scan on this function number, + * subtract 1 in BDF to satisfy loop increment. + */ + if (ari_cap & 0xff00) { + bdf = PCI_BDF(PCI_BUS(bdf), + PCI_DEV(ari_cap), + PCI_FUNC(ari_cap)); + bdf = bdf - 0x100; + } + } + } } return 0; @@ -842,7 +912,9 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, { int pci_addr_cells, addr_cells, size_cells; int cells_per_record; + struct bd_info *bd; const u32 *prop; + int max_regions; int len; int i; @@ -862,7 +934,13 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, hose->region_count = 0; debug("%s: len=%d, cells_per_record=%d\n", __func__, len, cells_per_record); - for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) { + + /* Dynamically allocate the regions array */ + max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS; + hose->regions = (struct pci_region *) + calloc(1, max_regions * sizeof(struct pci_region)); + + for (i = 0; i < max_regions; i++, len -= cells_per_record) { u64 pci_addr, addr, size; int space_code; u32 flags; @@ -897,10 +975,13 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, } pos = -1; - for (i = 0; i < hose->region_count; i++) { - if (hose->regions[i].flags == type) - pos = i; + if (!IS_ENABLED(CONFIG_PCI_REGION_MULTI_ENTRY)) { + for (i = 0; i < hose->region_count; i++) { + if (hose->regions[i].flags == type) + pos = i; + } } + if (pos == -1) pos = hose->region_count++; debug(" - type=%d, pos=%d\n", type, pos); @@ -908,9 +989,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, } /* Add a region for our local memory */ -#ifdef CONFIG_NR_DRAM_BANKS - bd_t *bd = gd->bd; - + bd = gd->bd; if (!bd) return; @@ -923,19 +1002,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); } } -#else - phys_addr_t base = 0, size; - - size = gd->ram_size; -#ifdef CONFIG_SYS_SDRAM_BASE - base = CONFIG_SYS_SDRAM_BASE; -#endif - if (gd->pci_ram_top && gd->pci_ram_top < base + size) - size = gd->pci_ram_top - base; - if (size) - pci_set_region(hose->regions + hose->region_count++, base, - base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); -#endif return; } @@ -961,12 +1027,18 @@ static int pci_uclass_pre_probe(struct udevice *bus) hose->bus = bus; hose->first_busno = bus->seq; hose->last_busno = bus->seq; + if (dev_of_valid(bus)) { + hose->skip_auto_config_until_reloc = + dev_read_bool(bus, + "u-boot,skip-auto-config-until-reloc"); + } return 0; } static int pci_uclass_post_probe(struct udevice *bus) { + struct pci_controller *hose = dev_get_uclass_priv(bus); int ret; debug("%s: probing bus %d\n", __func__, bus->seq); @@ -974,11 +1046,13 @@ static int pci_uclass_post_probe(struct udevice *bus) if (ret) return ret; -#ifdef CONFIG_PCI_PNP - ret = pci_auto_config_devices(bus); - if (ret < 0) - return ret; -#endif + if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() && + (!hose->skip_auto_config_until_reloc || + (gd->flags & GD_FLG_RELOC))) { + ret = pci_auto_config_devices(bus); + if (ret < 0) + return log_msg_ret("pci auto-config", ret); + } #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) /* @@ -994,7 +1068,7 @@ static int pci_uclass_post_probe(struct udevice *bus) * Note we only call this 1) after U-Boot is relocated, and 2) * root bus has finished probing. */ - if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) { + if ((gd->flags & GD_FLG_RELOC) && bus->seq == 0 && ll_boot_init()) { ret = fsp_init_phase_pci(); if (ret) return ret; @@ -1007,8 +1081,6 @@ static int pci_uclass_post_probe(struct udevice *bus) static int pci_uclass_child_post_bind(struct udevice *dev) { struct pci_child_platdata *pplat; - struct fdt_pci_addr addr; - int ret; if (!dev_of_valid(dev)) return 0; @@ -1019,19 +1091,12 @@ static int pci_uclass_child_post_bind(struct udevice *dev) ofnode_read_pci_vendev(dev_ofnode(dev), &pplat->vendor, &pplat->device); /* Extract the devfn from fdt_pci_addr */ - ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_CONFIG, "reg", - &addr); - if (ret) { - if (ret != -ENOENT) - return -EINVAL; - } else { - pplat->devfn = addr.phys_hi & 0xff00; - } + pplat->devfn = pci_get_devfn(dev); return 0; } -static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf, +static int pci_bridge_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) { @@ -1148,6 +1213,48 @@ ulong pci_conv_size_to_32(ulong old, ulong value, uint offset, return value; } +int pci_get_dma_regions(struct udevice *dev, struct pci_region *memp, int index) +{ + int pci_addr_cells, addr_cells, size_cells; + int cells_per_record; + const u32 *prop; + int len; + int i = 0; + + prop = ofnode_get_property(dev_ofnode(dev), "dma-ranges", &len); + if (!prop) { + log_err("PCI: Device '%s': Cannot decode dma-ranges\n", + dev->name); + return -EINVAL; + } + + pci_addr_cells = ofnode_read_simple_addr_cells(dev_ofnode(dev)); + addr_cells = ofnode_read_simple_addr_cells(dev_ofnode(dev->parent)); + size_cells = ofnode_read_simple_size_cells(dev_ofnode(dev)); + + /* PCI addresses are always 3-cells */ + len /= sizeof(u32); + cells_per_record = pci_addr_cells + addr_cells + size_cells; + debug("%s: len=%d, cells_per_record=%d\n", __func__, len, + cells_per_record); + + while (len) { + memp->bus_start = fdtdec_get_number(prop + 1, 2); + prop += pci_addr_cells; + memp->phys_start = fdtdec_get_number(prop, addr_cells); + prop += addr_cells; + memp->size = fdtdec_get_number(prop, size_cells); + prop += size_cells; + + if (i == index) + return 0; + i++; + len -= cells_per_record; + } + + return -EINVAL; +} + int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp) { @@ -1178,14 +1285,21 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop, return (*iop != NULL) + (*memp != NULL) + (*prefp != NULL); } -u32 dm_pci_read_bar32(struct udevice *dev, int barnum) +u32 dm_pci_read_bar32(const struct udevice *dev, int barnum) { u32 addr; int bar; bar = PCI_BASE_ADDRESS_0 + barnum * 4; dm_pci_read_config32(dev, bar, &addr); - if (addr & PCI_BASE_ADDRESS_SPACE_IO) + + /* + * If we get an invalid address, return this so that comparisons with + * FDT_ADDR_T_NONE work correctly + */ + if (addr == 0xffffffff) + return addr; + else if (addr & PCI_BASE_ADDRESS_SPACE_IO) return addr & PCI_BASE_ADDRESS_IO_MASK; else return addr & PCI_BASE_ADDRESS_MEM_MASK; @@ -1326,22 +1440,125 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, return bus_addr; } +static phys_addr_t dm_pci_map_ea_virt(struct udevice *dev, int ea_off, + struct pci_child_platdata *pdata) +{ + phys_addr_t addr = 0; + + /* + * In the case of a Virtual Function device using BAR + * base and size, add offset for VFn BAR(1, 2, 3...n) + */ + if (pdata->is_virtfn) { + size_t sz; + u32 ea_entry; + + /* MaxOffset, 1st DW */ + dm_pci_read_config32(dev, ea_off + 8, &ea_entry); + sz = ea_entry & PCI_EA_FIELD_MASK; + /* Fill up lower 2 bits */ + sz |= (~PCI_EA_FIELD_MASK); + + if (ea_entry & PCI_EA_IS_64) { + /* MaxOffset 2nd DW */ + dm_pci_read_config32(dev, ea_off + 16, &ea_entry); + sz |= ((u64)ea_entry) << 32; + } + + addr = (pdata->virtid - 1) * (sz + 1); + } + + return addr; +} + +static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags, + int ea_off, struct pci_child_platdata *pdata) +{ + int ea_cnt, i, entry_size; + int bar_id = (bar - PCI_BASE_ADDRESS_0) >> 2; + u32 ea_entry; + phys_addr_t addr; + + if (IS_ENABLED(CONFIG_PCI_SRIOV)) { + /* + * In the case of a Virtual Function device, device is + * Physical function, so pdata will point to required VF + * specific data. + */ + if (pdata->is_virtfn) + bar_id += PCI_EA_BEI_VF_BAR0; + } + + /* EA capability structure header */ + dm_pci_read_config32(dev, ea_off, &ea_entry); + ea_cnt = (ea_entry >> 16) & PCI_EA_NUM_ENT_MASK; + ea_off += PCI_EA_FIRST_ENT; + + for (i = 0; i < ea_cnt; i++, ea_off += entry_size) { + /* Entry header */ + dm_pci_read_config32(dev, ea_off, &ea_entry); + entry_size = ((ea_entry & PCI_EA_ES) + 1) << 2; + + if (((ea_entry & PCI_EA_BEI) >> 4) != bar_id) + continue; + + /* Base address, 1st DW */ + dm_pci_read_config32(dev, ea_off + 4, &ea_entry); + addr = ea_entry & PCI_EA_FIELD_MASK; + if (ea_entry & PCI_EA_IS_64) { + /* Base address, 2nd DW, skip over 4B MaxOffset */ + dm_pci_read_config32(dev, ea_off + 12, &ea_entry); + addr |= ((u64)ea_entry) << 32; + } + + if (IS_ENABLED(CONFIG_PCI_SRIOV)) + addr += dm_pci_map_ea_virt(dev, ea_off, pdata); + + /* size ignored for now */ + return map_physmem(addr, 0, flags); + } + + return 0; +} + void *dm_pci_map_bar(struct udevice *dev, int bar, int flags) { + struct pci_child_platdata *pdata = dev_get_parent_platdata(dev); + struct udevice *udev = dev; pci_addr_t pci_bus_addr; u32 bar_response; + int ea_off; + + if (IS_ENABLED(CONFIG_PCI_SRIOV)) { + /* + * In case of Virtual Function devices, use PF udevice + * as EA capability is defined in Physical Function + */ + if (pdata->is_virtfn) + udev = pdata->pfdev; + } + + /* + * if the function supports Enhanced Allocation use that instead of + * BARs + * Incase of virtual functions, pdata will help read VF BEI + * and EA entry size. + */ + ea_off = dm_pci_find_capability(udev, PCI_CAP_ID_EA); + if (ea_off) + return dm_pci_map_ea_bar(udev, bar, flags, ea_off, pdata); /* read BAR address */ - dm_pci_read_config32(dev, bar, &bar_response); + dm_pci_read_config32(udev, bar, &bar_response); pci_bus_addr = (pci_addr_t)(bar_response & ~0xf); /* * Pass "0" as the length argument to pci_bus_to_virt. The arg - * isn't actualy used on any platform because u-boot assumes a static + * isn't actually used on any platform because U-Boot assumes a static * linear mapping. In the future, this could read the BAR size * and pass that as the size if needed. */ - return dm_pci_bus_to_virt(dev, pci_bus_addr, flags, 0, MAP_NOCACHE); + return dm_pci_bus_to_virt(udev, pci_bus_addr, flags, 0, MAP_NOCACHE); } static int _dm_pci_find_next_capability(struct udevice *dev, u8 pos, int cap) @@ -1433,6 +1650,144 @@ int dm_pci_find_ext_capability(struct udevice *dev, int cap) return dm_pci_find_next_ext_capability(dev, 0, cap); } +int dm_pci_flr(struct udevice *dev) +{ + int pcie_off; + u32 cap; + + /* look for PCI Express Capability */ + pcie_off = dm_pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pcie_off) + return -ENOENT; + + /* check FLR capability */ + dm_pci_read_config32(dev, pcie_off + PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return -ENOENT; + + dm_pci_clrset_config16(dev, pcie_off + PCI_EXP_DEVCTL, 0, + PCI_EXP_DEVCTL_BCR_FLR); + + /* wait 100ms, per PCI spec */ + mdelay(100); + + return 0; +} + +#if defined(CONFIG_PCI_SRIOV) +int pci_sriov_init(struct udevice *pdev, int vf_en) +{ + u16 vendor, device; + struct udevice *bus; + struct udevice *dev; + pci_dev_t bdf; + u16 ctrl; + u16 num_vfs; + u16 total_vf; + u16 vf_offset; + u16 vf_stride; + int vf, ret; + int pos; + + pos = dm_pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) { + debug("Error: SRIOV capability not found\n"); + return -ENOENT; + } + + dm_pci_read_config16(pdev, pos + PCI_SRIOV_CTRL, &ctrl); + + dm_pci_read_config16(pdev, pos + PCI_SRIOV_TOTAL_VF, &total_vf); + if (vf_en > total_vf) + vf_en = total_vf; + dm_pci_write_config16(pdev, pos + PCI_SRIOV_NUM_VF, vf_en); + + ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; + dm_pci_write_config16(pdev, pos + PCI_SRIOV_CTRL, ctrl); + + dm_pci_read_config16(pdev, pos + PCI_SRIOV_NUM_VF, &num_vfs); + if (num_vfs > vf_en) + num_vfs = vf_en; + + dm_pci_read_config16(pdev, pos + PCI_SRIOV_VF_OFFSET, &vf_offset); + dm_pci_read_config16(pdev, pos + PCI_SRIOV_VF_STRIDE, &vf_stride); + + dm_pci_read_config16(pdev, PCI_VENDOR_ID, &vendor); + dm_pci_read_config16(pdev, pos + PCI_SRIOV_VF_DID, &device); + + bdf = dm_pci_get_bdf(pdev); + + pci_get_bus(PCI_BUS(bdf), &bus); + + if (!bus) + return -ENODEV; + + bdf += PCI_BDF(0, 0, vf_offset); + + for (vf = 0; vf < num_vfs; vf++) { + struct pci_child_platdata *pplat; + ulong class; + + pci_bus_read_config(bus, bdf, PCI_CLASS_DEVICE, + &class, PCI_SIZE_16); + + debug("%s: bus %d/%s: found VF %x:%x\n", __func__, + bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); + + /* Find this device in the device tree */ + ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev); + + if (ret == -ENODEV) { + struct pci_device_id find_id; + + memset(&find_id, '\0', sizeof(find_id)); + find_id.vendor = vendor; + find_id.device = device; + find_id.class = class; + + ret = pci_find_and_bind_driver(bus, &find_id, + bdf, &dev); + + if (ret) + return ret; + } + + /* Update the platform data */ + pplat = dev_get_parent_platdata(dev); + pplat->devfn = PCI_MASK_BUS(bdf); + pplat->vendor = vendor; + pplat->device = device; + pplat->class = class; + pplat->is_virtfn = true; + pplat->pfdev = pdev; + pplat->virtid = vf * vf_stride + vf_offset; + + debug("%s: bus %d/%s: found VF %x:%x %x:%x class %lx id %x\n", + __func__, dev->seq, dev->name, PCI_DEV(bdf), + PCI_FUNC(bdf), vendor, device, class, pplat->virtid); + bdf += PCI_BDF(0, 0, vf_stride); + } + + return 0; +} + +int pci_sriov_get_totalvfs(struct udevice *pdev) +{ + u16 total_vf; + int pos; + + pos = dm_pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) { + debug("Error: SRIOV capability not found\n"); + return -ENOENT; + } + + dm_pci_read_config16(pdev, pos + PCI_SRIOV_TOTAL_VF, &total_vf); + + return total_vf; +} +#endif /* SRIOV */ + UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", @@ -1441,8 +1796,8 @@ UCLASS_DRIVER(pci) = { .pre_probe = pci_uclass_pre_probe, .post_probe = pci_uclass_post_probe, .child_post_bind = pci_uclass_child_post_bind, - .per_device_auto_alloc_size = sizeof(struct pci_controller), - .per_child_platdata_auto_alloc_size = + .per_device_auto = sizeof(struct pci_controller), + .per_child_platdata_auto = sizeof(struct pci_child_platdata), }; @@ -1487,9 +1842,9 @@ void pci_init(void) * Enumerate all known controller devices. Enumeration has the side- * effect of probing them, so PCIe devices will be enumerated too. */ - for (uclass_first_device(UCLASS_PCI, &bus); + for (uclass_first_device_check(UCLASS_PCI, &bus); bus; - uclass_next_device(&bus)) { + uclass_next_device_check(&bus)) { ; } }