X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Ffpga%2Fversalpl.c;h=c44a7d3455751257e8913ccbb5453b85649306ba;hb=7a1a01c6029039e4fa6aa185cdbbf9a357eecba7;hp=6c69ab7802c60bd78b298188631032888e47783b;hpb=1eb69ae498567bb0b62ee554647204e8245cdacc;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c index 6c69ab7..c44a7d3 100644 --- a/drivers/fpga/versalpl.c +++ b/drivers/fpga/versalpl.c @@ -6,10 +6,12 @@ #include #include +#include #include #include #include #include +#include static ulong versal_align_dma_buffer(ulong *buf, u32 len) { @@ -30,7 +32,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize, ulong bin_buf; int ret; u32 buf_lo, buf_hi; - u32 ret_payload[5]; + u32 ret_payload[PAYLOAD_ARG_CNT]; bin_buf = versal_align_dma_buffer((ulong *)buf, bsize); @@ -43,7 +45,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize, ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo, buf_hi, 0, ret_payload); if (ret) - puts("PL FPGA LOAD fail\n"); + printf("PL FPGA LOAD failed with err: 0x%08x\n", ret); return ret; }