X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fddr%2Ffsl%2Ffsl_ddr_gen4.c;h=3349fc5c3b5907a4195c74b539dbb3002614d4e2;hb=235c5b8315c6a9eb566fd3d99a098cc6db869fc5;hp=30f60e0fe1aa38067416b42d597a7c99aca6de1d;hpb=5a17b8b5dab8973089b7400d05f8503d56f29370;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 30f60e0..3349fc5 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -11,6 +11,10 @@ #include #include #include +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \ + defined(CONFIG_ARM) +#include +#endif #if defined(CONFIG_SYS_FSL_ERRATUM_A008511) | \ defined(CONFIG_SYS_FSL_ERRATUM_A009803) @@ -64,24 +68,21 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #ifdef CONFIG_FSL_DDR_BIST char buffer[CONFIG_SYS_CBSIZE]; #endif -#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) - u32 ddr_freq; -#endif switch (ctrl_num) { case 0: ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR; break; -#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1) +#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) case 1: ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; break; #endif -#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2) +#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) case 2: ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; break; #endif -#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3) +#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 3) case 3: ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR; break; @@ -223,16 +224,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, ddr_out32(&ddr->debug[i], regs->debug[i]); } } -#ifdef CONFIG_SYS_FSL_ERRATUM_A008378 - /* Erratum applies when accumulated ECC is used, or DBI is enabled */ -#define IS_ACC_ECC_EN(v) ((v) & 0x4) -#define IS_DBI(v) ((((v) >> 12) & 0x3) == 0x2) - if (has_erratum_a008378()) { - if (IS_ACC_ECC_EN(regs->ddr_sdram_cfg) || - IS_DBI(regs->ddr_sdram_cfg_3)) - ddr_setbits32(&ddr->debug[28], 0x9 << 20); - } -#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A008511 /* Part 1 of 2 */ @@ -270,19 +261,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, ddr_out32(&ddr->debug[25], temp32); #endif -#ifdef CONFIG_SYS_FSL_ERRATUM_A009942 - ddr_freq = get_ddr_freq(ctrl_num) / 1000000; - temp32 = ddr_in32(&ddr->debug[28]); - if (ddr_freq <= 1333) - ddr_out32(&ddr->debug[28], temp32 | 0x0080006a); - else if (ddr_freq <= 1600) - ddr_out32(&ddr->debug[28], temp32 | 0x0070006f); - else if (ddr_freq <= 1867) - ddr_out32(&ddr->debug[28], temp32 | 0x00700076); - else if (ddr_freq <= 2133) - ddr_out32(&ddr->debug[28], temp32 | 0x0060007b); -#endif - #ifdef CONFIG_SYS_FSL_ERRATUM_A010165 temp32 = get_ddr_freq(ctrl_num) / 1000000; if ((temp32 > 1900) && (temp32 < 2300)) {