X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fclk%2Frockchip%2Fclk_rk3188.c;h=d4df8175f2e6d2448623eadf0cedba142b95f750;hb=1af3c7f422f627a544fec13e436d1a7975e39e73;hp=e6bf0442366359d8021c14174d05cc26dd59996b;hpb=d024236e5a31a2b4b82cbcc98b31b8170fc88d28;p=platform%2Fkernel%2Fu-boot.git diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index e6bf044..d4df817 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0 /* * (C) Copyright 2015 Google, Inc * (C) Copyright 2016 Heiko Stuebner - * - * SPDX-License-Identifier: GPL-2.0 */ #include @@ -10,18 +9,22 @@ #include #include #include +#include +#include #include #include #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include #include #include +#include #include +#include enum rk3188_clk_type { RK3188_CRU, @@ -563,6 +566,9 @@ static int rk3188_clk_probe(struct udevice *dev) #endif rkclk_init(priv->cru, priv->grf, priv->has_bwadj); + + /* Init CPU frequency */ + rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj); #endif return 0; @@ -588,7 +594,7 @@ static int rk3188_clk_bind(struct udevice *dev) sys_child->priv = priv; } -#if CONFIG_IS_ENABLED(CONFIG_RESET_ROCKCHIP) +#if CONFIG_IS_ENABLED(RESET_ROCKCHIP) ret = offsetof(struct rk3188_cru, cru_softrst_con[0]); ret = rockchip_reset_bind(dev, ret, 9); if (ret)