X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=drivers%2Fclk%2Faltera%2Fclk-arria10.c;h=ede0be299dfcbaa2c89f91ab04f1834d9c7d5571;hb=cd93d625fd751d55c729c78b10f82109d56a5f1d;hp=179869df45f7b1407633361af964de8999f520ab;hpb=216800acf1fbf9f498455bf3c92d4513d9a4c681;p=platform%2Fkernel%2Fu-boot.git

diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c
index 179869d..ede0be2 100644
--- a/drivers/clk/altera/clk-arria10.c
+++ b/drivers/clk/altera/clk-arria10.c
@@ -4,11 +4,15 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
 #include <dm/lists.h>
 #include <dm/util.h>
+#include <linux/bitops.h>
 
 #include <asm/arch/clock_manager.h>
 
@@ -255,7 +259,7 @@ static int socfpga_a10_clk_bind(struct udevice *dev)
 			continue;
 
 		if (pre_reloc_only &&
-		    !dm_ofnode_pre_reloc(offset_to_ofnode(offset)))
+		    !ofnode_pre_reloc(offset_to_ofnode(offset)))
 			continue;
 
 		ret = device_bind_driver_to_node(dev, "clk-a10", name,
@@ -271,6 +275,8 @@ static int socfpga_a10_clk_bind(struct udevice *dev)
 static int socfpga_a10_clk_probe(struct udevice *dev)
 {
 	struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+	struct socfpga_a10_clk_platdata *pplat;
+	struct udevice *pdev;
 	const void *fdt = gd->fdt_blob;
 	int offset = dev_of_offset(dev);
 
@@ -278,6 +284,21 @@ static int socfpga_a10_clk_probe(struct udevice *dev)
 
 	socfpga_a10_handoff_workaround(dev);
 
+	if (!fdt_node_check_compatible(fdt, offset, "altr,clk-mgr")) {
+		plat->regs = devfdt_get_addr(dev);
+	} else {
+		pdev = dev_get_parent(dev);
+		if (!pdev)
+			return -ENODEV;
+
+		pplat = dev_get_platdata(pdev);
+		if (!pplat)
+			return -EINVAL;
+
+		plat->ctl_reg = dev_read_u32_default(dev, "reg", 0x0);
+		plat->regs = pplat->regs;
+	}
+
 	if (!fdt_node_check_compatible(fdt, offset,
 				       "altr,socfpga-a10-pll-clock")) {
 		/* Main PLL has 3 upstream clock */
@@ -301,29 +322,8 @@ static int socfpga_a10_clk_probe(struct udevice *dev)
 static int socfpga_a10_ofdata_to_platdata(struct udevice *dev)
 {
 	struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
-	struct socfpga_a10_clk_platdata *pplat;
-	struct udevice *pdev;
-	const void *fdt = gd->fdt_blob;
 	unsigned int divreg[3], gatereg[2];
-	int ret, offset = dev_of_offset(dev);
-	u32 regs;
-
-	regs = dev_read_u32_default(dev, "reg", 0x0);
-
-	if (!fdt_node_check_compatible(fdt, offset, "altr,clk-mgr")) {
-		plat->regs = devfdt_get_addr(dev);
-	} else {
-		pdev = dev_get_parent(dev);
-		if (!pdev)
-			return -ENODEV;
-
-		pplat = dev_get_platdata(pdev);
-		if (!pplat)
-			return -EINVAL;
-
-		plat->ctl_reg = regs;
-		plat->regs = pplat->regs;
-	}
+	int ret;
 
 	plat->type = SOCFPGA_A10_CLK_UNKNOWN_CLK;