X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=cpu%2Fmpc8260%2Fcpu_init.c;h=36fc1eba5fd1014458fcf4d453a219eacf6e3d9c;hb=d61ea14885631e58a25feaa81ee82eb464c62d6a;hp=7dcc94999dc19ec7410718f1bded93ebbb5a002e;hpb=ddd4123336aad881f50dc34892ac150cfa8143fe;p=platform%2Fkernel%2Fu-boot.git

diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c
index 7dcc949..36fc1eb 100644
--- a/cpu/mpc8260/cpu_init.c
+++ b/cpu/mpc8260/cpu_init.c
@@ -129,9 +129,9 @@ void cpu_init_f (volatile immap_t * immr)
 	/* BCR - Bus Configuration Register (4-25) */
 #if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE)
 	if (immr->im_siu_conf.sc_bcr & BCR_EBM) {
-		immr->im_siu_conf.sc_bcr = CFG_BCR_60x;
+		immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_60x, 0x80000010);
 	} else {
-		immr->im_siu_conf.sc_bcr = CFG_BCR_SINGLE;
+		immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_SINGLE, 0x80000010);
 	}
 #else
 	immr->im_siu_conf.sc_bcr = CFG_BCR;
@@ -141,9 +141,9 @@ void cpu_init_f (volatile immap_t * immr)
 #if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH)
 	cpu_clk = board_get_cpu_clk_f ();
 	if (cpu_clk >= 100000000) {
-		immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_HIGH;
+		immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_HIGH, 0x9f3cc000);
 	} else {
-		immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_LOW;
+		immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_LOW, 0x9f3cc000);
 	}
 #else
 	immr->im_siu_conf.sc_siumcr = CFG_SIUMCR;
@@ -182,7 +182,7 @@ void cpu_init_f (volatile immap_t * immr)
 #endif
 
 	/* now restrict to preliminary range */
-	/* the PS came from the HRCW, don´t change it */
+	/* the PS came from the HRCW, don´t change it */
 	memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK);
 	memctl->memc_or0 = CFG_OR0_PRELIM;