X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=cpu%2Fat32ap%2Fcpu.c;h=904bfb227e5b2534cecf429213d55aa7f23bf905;hb=cb5473205206c7f14cbb1e747f28ec75b48826e2;hp=1a1370289d585d5f6a0dda663cd8b60a260f16ed;hpb=7772c13ba07eaabd42499998f3713b23350fc119;p=platform%2Fkernel%2Fu-boot.git

diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 1a13702..904bfb2 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -32,12 +32,12 @@
 #include "hsmc3.h"
 
 /* Sanity checks */
-#if (CFG_CLKDIV_CPU > CFG_CLKDIV_HSB)		\
-	|| (CFG_CLKDIV_HSB > CFG_CLKDIV_PBA)	\
-	|| (CFG_CLKDIV_HSB > CFG_CLKDIV_PBB)
+#if (CONFIG_SYS_CLKDIV_CPU > CONFIG_SYS_CLKDIV_HSB)		\
+	|| (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBA)	\
+	|| (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBB)
 # error Constraint fCPU >= fHSB >= fPB{A,B} violated
 #endif
-#if defined(CONFIG_PLL) && ((CFG_PLL0_MUL < 1) || (CFG_PLL0_DIV < 1))
+#if defined(CONFIG_PLL) && ((CONFIG_SYS_PLL0_MUL < 1) || (CONFIG_SYS_PLL0_DIV < 1))
 # error Invalid PLL multiplier and/or divider
 #endif
 
@@ -47,7 +47,7 @@ int cpu_init(void)
 {
 	extern void _evba(void);
 
-	gd->cpu_hz = CFG_OSC0_HZ;
+	gd->cpu_hz = CONFIG_SYS_OSC0_HZ;
 
 	/* TODO: Move somewhere else, but needs to be run before we
 	 * increase the clock frequency. */
@@ -65,9 +65,6 @@ int cpu_init(void)
 	sysreg_write(EVBA, (unsigned long)&_evba);
 	asm volatile("csrf	%0" : : "i"(SYSREG_EM_OFFSET));
 
-	if(gclk_init)
-		gclk_init();
-
 	return 0;
 }