X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=cpu%2FChangeLog;h=0594cdf9330048d343b0d2cbfd3719e95702549d;hb=feba93770920f91760d6390541221b75ba5c95f3;hp=667538ac2922f089a37f6c370ab0076c536a6a74;hpb=21375995bd28258d997c67b0736426e5aabc581b;p=platform%2Fupstream%2Fbinutils.git diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 667538a..0594cdf 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,109 @@ +2014-07-20 Stefan Kristiansson + + * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. + +2014-06-12 Alan Modra + + * or1k.opc: Whitespace fixes. + +2014-05-08 Stefan Kristiansson + + * or1korbis.cpu (h-atomic-reserve): New hardware. + (h-atomic-address): Likewise. + (insn-opcode): Add opcodes for LWA and SWA. + (atomic-reserve): New operand. + (atomic-address): Likewise. + (l-lwa, l-swa): New instructions. + (l-lbs): Fix typo in comment. + (store-insn): Clear atomic reserve on store to atomic-address. + Fix register names in fmt field. + +2014-04-22 Christian Svensson + + * openrisc.cpu: Delete. + * openrisc.opc: Delete. + * or1k.cpu: New file. + * or1k.opc: New file. + * or1kcommon.cpu: New file. + * or1korbis.cpu: New file. + * or1korfpx.cpu: New file. + +2013-12-07 Mike Frysinger + + * epiphany.opc: Remove +x file mode. + +2013-03-08 Yann Sionneau + + PR binutils/15241 + * lm32.cpu (Control and status registers): Add CFG2, PSW, + TLBVADDR, TLBPADDR and TLBBADVADDR. + +2012-11-30 Oleg Raikhman + Joern Rennecke + + * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. + (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. + (testset-insn): Add NO_DIS attribute to t.l. + (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. + (move-insns): Add NO-DIS attribute to cmov.l. + (op-mmr-movts): Add NO-DIS attribute to movts.l. + (op-mmr-movfs): Add NO-DIS attribute to movfs.l. + (op-rrr): Add NO-DIS attribute to .l. + (shift-rrr): Add NO-DIS attribute to .l. + (op-shift-rri): Add NO-DIS attribute to i32.l. + (bitrl, movtl): Add NO-DIS attribute. + (op-iextrrr): Add NO-DIS attribute to .l + (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. + (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. + +2012-02-27 Alan Modra + + * mt.opc (print_dollarhex): Trim values to 32 bits. + +2011-12-15 Nick Clifton + + * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit + hosts. + +2011-10-26 Joern Rennecke + + * epiphany.opc (parse_branch_addr): Fix type of valuep. + Cast value before printing it as a long. + (parse_postindex): Fix type of valuep. + +2011-10-25 Joern Rennecke + + * cpu/epiphany.cpu: New file. + * cpu/epiphany.opc: New file. + +2011-08-22 Nick Clifton + + * fr30.cpu: Newly contributed file. + * fr30.opc: Likewise. + * ip2k.cpu: Likewise. + * ip2k.opc: Likewise. + * mep-avc.cpu: Likewise. + * mep-avc2.cpu: Likewise. + * mep-c5.cpu: Likewise. + * mep-core.cpu: Likewise. + * mep-default.cpu: Likewise. + * mep-ext-cop.cpu: Likewise. + * mep-fmax.cpu: Likewise. + * mep-h1.cpu: Likewise. + * mep-ivc2.cpu: Likewise. + * mep-rhcop.cpu: Likewise. + * mep-sample-ucidsp.cpu: Likewise. + * mep.cpu: Likewise. + * mep.opc: Likewise. + * openrisc.cpu: Likewise. + * openrisc.opc: Likewise. + * xstormy16.cpu: Likewise. + * xstormy16.opc: Likewise. + +2010-10-08 Pierre Muller + + * frv.opc: #undef DEBUG. + 2010-07-03 DJ Delorie * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. @@ -759,6 +865,12 @@ * New file. +Copyright (C) 2003-2012 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. + Local Variables: mode: change-log left-margin: 8