X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=cpu%2F74xx_7xx%2Fkgdb.S;h=ad487cdaf45007b03944d2136774a70b989ab03d;hb=6d0f6bcf337c5261c08fabe12982178c2c489d76;hp=4f231228c2285950ed4f2df46f99ec01111bcc7f;hpb=71edc271816ec82cf0550dd6980be2da3cc2ad9e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/cpu/74xx_7xx/kgdb.S b/cpu/74xx_7xx/kgdb.S
index 4f23122..ad487cd 100644
--- a/cpu/74xx_7xx/kgdb.S
+++ b/cpu/74xx_7xx/kgdb.S
@@ -43,7 +43,7 @@ kgdb_flush_cache_all:
 	addis	r4,r0,0x0040
 kgdb_flush_loop:
 	lwz	r5,0(r3)
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_SYS_CACHELINE_SIZE
 	cmp	0,0,r3,r4
 	bne	kgdb_flush_loop
 	SYNC
@@ -55,21 +55,21 @@ kgdb_flush_loop:
 
 	.globl	kgdb_flush_cache_range
 kgdb_flush_cache_range:
-	li	r5,CFG_CACHELINE_SIZE-1
+	li	r5,CONFIG_SYS_CACHELINE_SIZE-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
 	add	r4,r4,r5
-	srwi.	r4,r4,CFG_CACHELINE_SHIFT
+	srwi.	r4,r4,CONFIG_SYS_CACHELINE_SHIFT
 	beqlr
 	mtctr	r4
 	mr	r6,r3
 1:	dcbst	0,r3
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_SYS_CACHELINE_SIZE
 	bdnz	1b
 	sync				/* wait for dcbst's to get to ram */
 	mtctr	r4
 2:	icbi	0,r6
-	addi	r6,r6,CFG_CACHELINE_SIZE
+	addi	r6,r6,CONFIG_SYS_CACHELINE_SIZE
 	bdnz	2b
 	SYNC
 	blr