X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2Fzynq_zc770_xm011_x16_defconfig;h=70429a2f25455c47c1ce009e0f68382051fa0fec;hb=44fb0d6c9f5147a41c710032869e5e01b3c9e310;hp=bd0ec7b33b784690b0fd1b08092b593c8b97aef9;hpb=ee5f24909f0b35befb0d1436221cea58cf823865;p=platform%2Fkernel%2Fu-boot.git diff --git a/configs/zynq_zc770_xm011_x16_defconfig b/configs/zynq_zc770_xm011_x16_defconfig index bd0ec7b..70429a2 100644 --- a/configs/zynq_zc770_xm011_x16_defconfig +++ b/configs/zynq_zc770_xm011_x16_defconfig @@ -1,21 +1,24 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16" CONFIG_SPL_STACK_R_ADDR=0x200000 -# CONFIG_SPL_FAT_SUPPORT is not set -CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16" +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16" +# CONFIG_SPL_FS_FAT is not set CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_CUSTOM_LDSCRIPT=y +CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_USE_BOOTCOMMAND is not set -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y -CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y @@ -27,19 +30,17 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y # CONFIG_CMD_NET is not set CONFIG_CMD_CACHE=y # CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set -CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16" CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BLK=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQPL=y CONFIG_DM_GPIO=y # CONFIG_MMC is not set -CONFIG_DM_MMC=y +CONFIG_MTD_DEVICE=y CONFIG_NAND=y CONFIG_NAND_ZYNQ=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y