X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2Fkmtepr2_defconfig;h=56fb2c34bab346cd4fbf51ced29b634ed0b24bc7;hb=cc1e98b559e46630c3421a7762d02a58e5480926;hp=bb23786057824bbef5a68e26f74713f151e24946;hpb=30915ab95d9a95328623010390d94da1325529f9;p=platform%2Fkernel%2Fu-boot.git

diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index bb23786..56fb2c3 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -76,6 +76,29 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
 CONFIG_BAT6_DCACHE_GUARDED=y
 CONFIG_BAT6_USER_MODE_VALID=y
 CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_LBLAW0=y
+CONFIG_LBLAW0_BASE=0xF0000000
+CONFIG_LBLAW0_NAME="FLASH"
+CONFIG_LBLAW0_LENGTH_256_MBYTES=y
+CONFIG_LBLAW1=y
+CONFIG_LBLAW1_BASE=0xE8000000
+CONFIG_LBLAW1_NAME="KMBEC_FPGA"
+CONFIG_LBLAW1_LENGTH_128_MBYTES=y
+CONFIG_LBLAW2=y
+CONFIG_LBLAW2_BASE=0xA0000000
+CONFIG_LBLAW2_NAME="APP1"
+CONFIG_LBLAW2_LENGTH_256_MBYTES=y
+CONFIG_LBLAW3=y
+CONFIG_LBLAW3_BASE=0xB0000000
+CONFIG_LBLAW3_NAME="APP2"
+CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
+CONFIG_ACR_PIPE_DEP_4=y
+CONFIG_ACR_RPTCNT_4=y
+CONFIG_ACR_APARK_MASTER=y
+CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_MISC_INIT_R=y
@@ -112,5 +135,51 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 # CONFIG_PCI is not set
+CONFIG_QE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_ELBC_BR0_OR0=y
+CONFIG_BR0_OR0_NAME="FLASH"
+CONFIG_BR0_OR0_BASE=0xF0000000
+CONFIG_BR0_MACHINE_GPCM=y
+CONFIG_BR0_PORTSIZE_16BIT=y
+CONFIG_OR0_AM_256_MBYTES=y
+CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR0_CSNT_EARLIER=y
+CONFIG_OR0_EAD_EXTRA=y
+CONFIG_OR0_SCY_5=y
+CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_ELBC_BR1_OR1=y
+CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
+CONFIG_BR1_OR1_BASE=0xE8000000
+CONFIG_BR1_MACHINE_GPCM=y
+CONFIG_BR1_PORTSIZE_8BIT=y
+CONFIG_OR1_AM_128_MBYTES=y
+CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR1_CSNT_EARLIER=y
+CONFIG_OR1_EAD_EXTRA=y
+CONFIG_OR1_SCY_2=y
+CONFIG_OR1_TRLX_RELAXED=y
+CONFIG_ELBC_BR2_OR2=y
+CONFIG_BR2_OR2_NAME="APP1"
+CONFIG_BR2_OR2_BASE=0xA0000000
+CONFIG_BR2_MACHINE_GPCM=y
+CONFIG_BR2_PORTSIZE_8BIT=y
+CONFIG_OR2_AM_256_MBYTES=y
+CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
+CONFIG_OR2_CSNT_EARLIER=y
+CONFIG_OR2_EAD_EXTRA=y
+CONFIG_OR2_SCY_2=y
+CONFIG_OR2_TRLX_RELAXED=y
+CONFIG_OR2_EHTR_4_CYCLE=y
+CONFIG_ELBC_BR3_OR3=y
+CONFIG_BR3_OR3_NAME="APP2"
+CONFIG_BR3_OR3_BASE=0xB0000000
+CONFIG_BR3_MACHINE_GPCM=y
+CONFIG_BR3_PORTSIZE_16BIT=y
+CONFIG_OR3_AM_256_MBYTES=y
+CONFIG_OR3_SCY_4=y
+CONFIG_OR3_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y