X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2Fconga-qeval20-qa3-e3845-internal-uart_defconfig;h=a0cce754ff7d8f6543f2fee2d514c6c2aefdc296;hb=235c5b8315c6a9eb566fd3d99a098cc6db869fc5;hp=d96bfcbe14ad59012fdd7a58093e11816ca84e7c;hpb=1622559066d890f1b7622be0ede8a5d64de66ef3;p=platform%2Fkernel%2Fu-boot.git

diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index d96bfcb..a0cce75 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -3,6 +3,7 @@ CONFIG_VENDOR_CONGATEC=y
 CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
 CONFIG_INTERNAL_UART=y
+CONFIG_DEBUG_UART=y
 CONFIG_HAVE_INTEL_ME=y
 CONFIG_ENABLE_MRC_CACHE=y
 CONFIG_SMP=y
@@ -62,7 +63,6 @@ CONFIG_DM_ETH=y
 CONFIG_E1000=y
 CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
-CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_SYS_NS16550=y