X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2FT1042D4RDB_defconfig;h=9906bf887562ef9677170594842a844c05f5a8cc;hb=3dc2987f5c9b79e19ea6b0e69e01a817310abaac;hp=7d2b530a9bcece30c2be94e01eb9ed9045613bfc;hpb=d7869b2183d2b786e5410b97a5a6b2e630e7825e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 7d2b530..4445801 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -1,49 +1,102 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
+CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_PCIE1=y
+CONFIG_PCIE2=y
+CONFIG_PCIE3=y
+CONFIG_PCIE4=y
+CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
 CONFIG_SILENT_CONSOLE=y
-# CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_ARCH_MISC_INIT=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_BMP=y
-CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="uImage"
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="FM1@DTSEC4"
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
 CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_SPI_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_BANKS=2
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
 CONFIG_MII=y
+CONFIG_PCIE_FSL=y
+CONFIG_U_QE=y
+CONFIG_SYS_QE_FW_ADDR=0xEFF10000
+CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_MAX_CONTROLLER_COUNT=2
 CONFIG_USB_STORAGE=y
-CONFIG_VIDEO=y
-CONFIG_CFB_CONSOLE_ANSI=y
-CONFIG_OF_LIBFDT=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64