X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2FP4080DS_SPIFLASH_defconfig;h=0290987e57a71d59f0c022c465b9dc7d92e49bac;hb=cd9b71c3f629c97a0e516d2ad2d2e4baae74d440;hp=bd7ce5e1f0067d2acf95ed44bbe94e829d349e4c;hpb=8c56ea5c1e033f16993e5427300399ef848234bb;p=platform%2Fkernel%2Fu-boot.git

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index bd7ce5e..cdd956b 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -1,50 +1,107 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_CACHE_STASHING=y
+CONFIG_PCIE1=y
+CONFIG_PCIE2=y
+CONFIG_PCIE3=y
+CONFIG_SYS_FSL_NUM_CC_PLLS=4
+CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_DYNAMIC_SYS_CLK_FREQ=y
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SPIFLASH=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
 CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_ARCH_MISC_INIT=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
 CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="uImage"
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="FM1@DTSEC1"
+CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_BR0_PRELIM_BOOL=y
+CONFIG_SYS_BR0_PRELIM=0xE8001001
+CONFIG_SYS_OR0_PRELIM=0xF8000F85
+CONFIG_SYS_BR1_PRELIM_BOOL=y
+CONFIG_SYS_BR1_PRELIM=0xE0001001
+CONFIG_SYS_OR1_PRELIM=0xF8000FF7
+CONFIG_SYS_BR3_PRELIM_BOOL=y
+CONFIG_SYS_BR3_PRELIM=0xFFDF0801
+CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
+CONFIG_SYS_MAX_FLASH_BANKS=2
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
 CONFIG_MII=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_MAX_CONTROLLER_COUNT=2
 CONFIG_USB_STORAGE=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64