X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=configs%2FP1020RDB-PD_SPIFLASH_defconfig;h=88365bff62b9dcf6f327cbcc229e8577e1680010;hb=3dc2987f5c9b79e19ea6b0e69e01a817310abaac;hp=bce232e99d3a9a4c753d99ad681b309d27d440b6;hpb=2abf048ab7b835787d6627423559832f2b18f253;p=platform%2Fkernel%2Fu-boot.git diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index bce232e..88365bf 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -15,12 +15,18 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -28,12 +34,22 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -54,9 +70,14 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 @@ -66,6 +87,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y