X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=common_mips64.h;h=93bc7e519f139b5181767b8c8a26977a014d1e57;hb=refs%2Fheads%2Faccepted%2Ftizen_5.5_unified;hp=7cd86b37584e791579edf225a51dc82348cbca0a;hpb=37aee1f9b1dd16b5d27b63637deb2f40665ae059;p=platform%2Fupstream%2Fopenblas.git

diff --git a/common_mips64.h b/common_mips64.h
index 7cd86b3..93bc7e5 100644
--- a/common_mips64.h
+++ b/common_mips64.h
@@ -71,37 +71,16 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef COMMON_MIPS64
 #define COMMON_MIPS64
 
-#define MB
-#define WMB
+#define MB  __sync_synchronize()
+#define WMB __sync_synchronize()
 
 #define INLINE inline
 
 #ifndef ASSEMBLER
 
-static void INLINE blas_lock(volatile unsigned long *address){
-
-  long int ret, val = 1;
-
-  do {
-    while (*address) {YIELDING;};
-
-    __asm__ __volatile__(
-			 "1:	ll	%0, %3\n"
-			 "	ori	%2, %0, 1\n"
-			 "	sc	%2, %1\n"
-			 "	beqz	%2, 1b\n"
-			 "	 andi	%2, %0, 1\n"
-			 "	sync\n"
-			 : "=&r" (val), "=m" (address), "=&r" (ret)
-			 : "m" (address)
-			 : "memory");
-
-  } while (ret);
-}
-
 static inline unsigned int rpcc(void){
   unsigned long ret;
-#if defined(LOONGSON3A) || defined(LOONGSON3B)
+
   //  unsigned long long tmp;
   //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
   //ret=tmp;
@@ -110,16 +89,10 @@ static inline unsigned int rpcc(void){
                        "rdhwr %0, $2\n"
                        ".set pop": "=r"(ret):: "memory");
 
-#else
-  __asm__ __volatile__(".set   push    \n"
-          ".set   mips32r2\n"
-          "rdhwr %0, $30  \n"
-          ".set pop" : "=r"(ret) : : "memory");
-#endif
   return ret;
 }
+#define RPCC_DEFINED
 
-#if defined(LOONGSON3A) || defined(LOONGSON3B)
 #ifndef NO_AFFINITY
 #define WHEREAMI
 static inline int WhereAmI(void){
@@ -132,7 +105,6 @@ static inline int WhereAmI(void){
 
 }
 #endif
-#endif
 
 static inline int blas_quickdivide(blasint x, blasint y){
   return x / y;