X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=common%2Fboard_f.c;h=850d19db750d2dc9b66683558297d89589d95b2d;hb=235c5b8315c6a9eb566fd3d99a098cc6db869fc5;hp=eed3e7be2a17b8853780eb986765fd153d01495b;hpb=69153988a6f4eda44257c6bc5afac484f8f95930;p=platform%2Fkernel%2Fu-boot.git diff --git a/common/board_f.c b/common/board_f.c index eed3e7b..850d19d 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -31,6 +31,9 @@ #include #include #include +#ifdef CONFIG_MACH_TYPE +#include +#endif #if defined(CONFIG_MP) && defined(CONFIG_PPC) #include #endif @@ -384,7 +387,7 @@ static int reserve_video(void) gd->fb_base = gd->relocaddr; # endif /* CONFIG_FB_ADDR */ #elif defined(CONFIG_VIDEO) && \ - (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ + (!defined(CONFIG_PPC)) && \ !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ !defined(CONFIG_M68K) /* reserve memory for video display (always full pages) */ @@ -488,6 +491,20 @@ static int reserve_fdt(void) return 0; } +static int reserve_bootstage(void) +{ +#ifdef CONFIG_BOOTSTAGE + int size = bootstage_get_size(); + + gd->start_addr_sp -= size; + gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); + debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, + gd->start_addr_sp); +#endif + + return 0; +} + int arch_reserve_stacks(void) { return 0; @@ -530,11 +547,10 @@ static int setup_board_part1(void) bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ #endif -#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ - defined(CONFIG_E500) || defined(CONFIG_MPC86xx) +#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ #endif -#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) +#if defined(CONFIG_M68K) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ #endif #if defined(CONFIG_MPC83xx) @@ -558,13 +574,6 @@ static int setup_board_part2(void) bd->bi_sccfreq = gd->arch.scc_clk; bd->bi_vco = gd->arch.vco_out; #endif /* CONFIG_CPM2 */ -#if defined(CONFIG_MPC512X) - bd->bi_ipsfreq = gd->arch.ips_clk; -#endif /* CONFIG_MPC512X */ -#if defined(CONFIG_MPC5xxx) - bd->bi_ipbfreq = gd->arch.ipb_clk; - bd->bi_pcifreq = gd->pci_clk; -#endif /* CONFIG_MPC5xxx */ #if defined(CONFIG_M68K) && defined(CONFIG_PCI) bd->bi_pcifreq = gd->pci_clk; #endif @@ -602,6 +611,24 @@ static int reloc_fdt(void) return 0; } +static int reloc_bootstage(void) +{ +#ifdef CONFIG_BOOTSTAGE + if (gd->flags & GD_FLG_SKIP_RELOC) + return 0; + if (gd->new_bootstage) { + int size = bootstage_get_size(); + + debug("Copying bootstage from %p to %p, size %x\n", + gd->bootstage, gd->new_bootstage, size); + memcpy(gd->new_bootstage, gd->bootstage, size); + gd->bootstage = gd->new_bootstage; + } +#endif + + return 0; +} + static int setup_reloc(void) { if (gd->flags & GD_FLG_SKIP_RELOC) { @@ -610,13 +637,16 @@ static int setup_reloc(void) } #ifdef CONFIG_SYS_TEXT_BASE - gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; -#ifdef CONFIG_M68K +#ifdef ARM + gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; +#elif defined(CONFIG_M68K) /* * On all ColdFire arch cpu, monitor code starts always * just after the default vector table location, so at 0x400 */ gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); +#else + gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; #endif #endif memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); @@ -670,8 +700,26 @@ static int jump_to_copy(void) #endif /* Record the board_init_f() bootstage (after arch_cpu_init()) */ -static int mark_bootstage(void) +static int initf_bootstage(void) { + bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && + IS_ENABLED(CONFIG_BOOTSTAGE_STASH); + int ret; + + ret = bootstage_init(!from_spl); + if (ret) + return ret; + if (from_spl) { + const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, + CONFIG_BOOTSTAGE_STASH_SIZE); + + ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); + if (ret && ret != -ENOENT) { + debug("Failed to unstash bootstage: err=%d\n", ret); + return ret; + } + } + bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); return 0; @@ -691,7 +739,9 @@ static int initf_dm(void) #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) int ret; + bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f"); ret = dm_init_and_scan(true); + bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F); if (ret) return ret; #endif @@ -724,6 +774,7 @@ static const init_fnc_t init_sequence_f[] = { trace_early_init, #endif initf_malloc, + initf_bootstage, /* uses its own timer, so does not need DM */ initf_console_record, #if defined(CONFIG_HAVE_FSP) arch_fsp_init, @@ -732,7 +783,6 @@ static const init_fnc_t init_sequence_f[] = { mach_cpu_init, /* SoC/machine dependent CPU setup */ initf_dm, arch_cpu_init_dm, - mark_bootstage, /* need timer, go after init dm */ #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif @@ -740,7 +790,9 @@ static const init_fnc_t init_sequence_f[] = { /* get CPU and bus clocks according to the environment variable */ get_clocks, /* get CPU and bus clocks (etc.) */ #endif +#if !defined(CONFIG_M68K) timer_init, /* initialize timer */ +#endif #if defined(CONFIG_BOARD_POSTCLK_INIT) board_postclk_init, #endif @@ -817,6 +869,7 @@ static const init_fnc_t init_sequence_f[] = { setup_machine, reserve_global_data, reserve_fdt, + reserve_bootstage, reserve_arch, reserve_stacks, dram_init_banksize, @@ -838,6 +891,7 @@ static const init_fnc_t init_sequence_f[] = { #endif INIT_FUNC_WATCHDOG_RESET reloc_fdt, + reloc_bootstage, setup_reloc, #if defined(CONFIG_X86) || defined(CONFIG_ARC) copy_uboot_to_ram,