X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fti%2Fks2_evm%2Fboard.c;h=1683f780a33b646ca67a466e5ae54273fe2cded6;hb=65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8;hp=3e06800608ab36a5ef43de72a3085e0219665979;hpb=c49aff3e66b930aa06936afee401cf5e19377958;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 3e06800..1683f78 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -7,7 +7,12 @@
  */
 
 #include <common.h>
+#include <asm/global_data.h>
 #include "board.h"
+#include <env.h>
+#include <hang.h>
+#include <image.h>
+#include <init.h>
 #include <spl.h>
 #include <exports.h>
 #include <fdt_support.h>
@@ -41,14 +46,14 @@ int dram_init(void)
 
 	ddr3_size = ddr3_init();
 
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
 #if defined(CONFIG_TI_AEMIF)
-	if (!board_is_k2g_ice())
+	if (!(board_is_k2g_ice() || board_is_k2g_i1()))
 		aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
 #endif
 
-	if (!board_is_k2g_ice()) {
+	if (!(board_is_k2g_ice() || board_is_k2g_i1())) {
 		if (ddr3_size)
 			ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
 		else
@@ -59,15 +64,14 @@ int dram_init(void)
 	return 0;
 }
 
-struct image_header *spl_get_load_buffer(ssize_t offset, size_t size)
+struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
 {
-	return (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+	return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE);
 }
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
@@ -90,7 +94,7 @@ u32 spl_boot_device(void)
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
 {
 	int lpae;
 	char *env;
@@ -116,8 +120,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 	/* adjust memory start address for LPAE */
 	if (lpae) {
-		start[0] -= CONFIG_SYS_SDRAM_BASE;
-		start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
+		start[0] -= CFG_SYS_SDRAM_BASE;
+		start[0] += CFG_SYS_LPAE_SDRAM_BASE;
 	}
 
 	if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
@@ -142,7 +146,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	return 0;
 }
 
-void ft_board_setup_ex(void *blob, bd_t *bd)
+void ft_board_setup_ex(void *blob, struct bd_info *bd)
 {
 	int lpae;
 	u64 size;
@@ -170,12 +174,12 @@ void ft_board_setup_ex(void *blob, bd_t *bd)
 					    "linux,initrd-end", NULL);
 			if (prop1 && prop2) {
 				initrd_start = __be64_to_cpu(*prop1);
-				initrd_start -= CONFIG_SYS_SDRAM_BASE;
-				initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
+				initrd_start -= CFG_SYS_SDRAM_BASE;
+				initrd_start += CFG_SYS_LPAE_SDRAM_BASE;
 				initrd_start = __cpu_to_be64(initrd_start);
 				initrd_end = __be64_to_cpu(*prop2);
-				initrd_end -= CONFIG_SYS_SDRAM_BASE;
-				initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
+				initrd_end -= CFG_SYS_SDRAM_BASE;
+				initrd_end += CFG_SYS_LPAE_SDRAM_BASE;
 				initrd_end = __cpu_to_be64(initrd_end);
 
 				err = fdt_delprop(blob, nodeoffset,
@@ -217,9 +221,9 @@ void ft_board_setup_ex(void *blob, bd_t *bd)
 			*reserve_start = __cpu_to_be64(*reserve_start);
 			size = __cpu_to_be64(*(reserve_start + 1));
 			if (size) {
-				*reserve_start -= CONFIG_SYS_SDRAM_BASE;
+				*reserve_start -= CFG_SYS_SDRAM_BASE;
 				*reserve_start +=
-					CONFIG_SYS_LPAE_SDRAM_BASE;
+					CFG_SYS_LPAE_SDRAM_BASE;
 				*reserve_start =
 					__cpu_to_be64(*reserve_start);
 			} else {