X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fstxxtc%2Fstxxtc.c;h=717dbe20846b5b77eefb41578713b536a87dadef;hb=84efbf4d144ff8aaed3cca036aebb1fe69eff3f4;hp=b38b4bea47409f2880204f2ebef5f6d1861a4732;hpb=22e05df45cc343eda3266312bde676737d9bc70c;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c index b38b4be..717dbe2 100644 --- a/board/stxxtc/stxxtc.c +++ b/board/stxxtc/stxxtc.c @@ -349,7 +349,7 @@ static const uint nandcs_table[0x40] = { #define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU) /* 9 */ -#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ +#define CONFIG_SYS_MAMR ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) @@ -399,9 +399,9 @@ void check_ram(unsigned int addr, unsigned int size) #define DO_LOOP do { for (;;) asm volatile ("nop" : : : "memory"); } while(0) -long int initdram(int board_type) +phys_size_t initdram(int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size; u32 d1, d2; @@ -418,10 +418,10 @@ long int initdram(int board_type) /* * Map controller bank 3 to the SDRAM bank at preliminary address. */ - memctl->memc_or4 = CFG_OR4_PRELIM; - memctl->memc_br4 = CFG_BR4_PRELIM; + memctl->memc_or4 = CONFIG_SYS_OR4_PRELIM; + memctl->memc_br4 = CONFIG_SYS_BR4_PRELIM; - memctl->memc_mamr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */ + memctl->memc_mamr = CONFIG_SYS_MAMR & ~MAMR_PTAE; /* no refresh yet */ udelay(200); @@ -481,12 +481,12 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - miiphy_read(phyno, PHY_PHYIDR1, &v); + miiphy_read("FEC ETHERNET", phyno, PHY_PHYIDR1, &v); if (v == 0xFFFF) continue; - miiphy_write(phyno, PHY_BMCR, PHY_BMCR_POWD); + miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD); udelay(10000); - miiphy_write(phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON); + miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON); udelay(10000); } } @@ -529,7 +529,7 @@ void reset_phys(void) int board_early_init_f(void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile iop8xx_t *ioport = &immap->im_ioport; volatile cpm8xx_t *cpm = &immap->im_cpm; volatile memctl8xx_t *memctl = &immap->im_memctl; @@ -574,22 +574,6 @@ int board_early_init_f(void) return 0; } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) - -#include - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen; - - totlen = nand_probe(CFG_NAND_BASE); - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) @@ -599,21 +583,7 @@ void hw_watchdog_reset(void) #endif -#ifdef CONFIG_SHOW_ACTIVITY - -/* called from timer interrupt every 1/CFG_HZ sec */ -void board_show_activity(ulong timestamp) -{ -} - -/* called when looping */ -void show_activity(int arg) -{ -} - -#endif - -#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE) +#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) int overwrite_console(void) { /* printf("overwrite_console called\n"); */