X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fspear%2Fspear320%2Fspear320.c;h=ab732a724c7fb87235b17a3f038696c78655ec73;hb=1ad6364eeb4f578e423081d1748e8a3fdf1ab01d;hp=2ba2dbb5666388b42903c88e0a65da04338dbec9;hpb=45e565337a90bbca0c1bb712b5e008b7c0b18bd5;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c index 2ba2dbb..ab732a7 100644 --- a/board/spear/spear320/spear320.c +++ b/board/spear/spear320/spear320.c @@ -3,35 +3,33 @@ * Ryan Chen, ST Micoelectronics, ryan.chen@st.com. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include #include #include +#include #include #include #include -#include + +#define PLGPIO_SEL_36 0xb3000028 +#define PLGPIO_IO_36 0xb3000038 + +static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; + +static void spear_phy_reset(void) +{ + writel(0x10, PLGPIO_IO_36); + writel(0x10, PLGPIO_SEL_36); +} int board_init(void) { + spear_phy_reset(); return spear_board_init(MACH_TYPE_SPEAR320); } @@ -42,18 +40,38 @@ int board_init(void) * Called by nand_init_chip to initialize the board specific functions */ -int board_nand_init(struct nand_chip *nand) +void board_nand_init() { struct misc_regs *const misc_regs_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + struct nand_chip *nand = &nand_chip[0]; +#if defined(CONFIG_NAND_FSMC) if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == MISC_SOCCFG30) || ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == MISC_SOCCFG31)) { - return spear_nand_init(nand); + fsmc_nand_init(nand); } +#endif + + return; +} + +int board_eth_init(bd_t *bis) +{ + int ret = 0; - return -1; +#if defined(CONFIG_DESIGNWARE_ETH) + u32 interface = PHY_INTERFACE_MODE_MII; + if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0) + ret++; +#endif +#if defined(CONFIG_MACB) + if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE, + CONFIG_MACB0_PHY) >= 0) + ret++; +#endif + return ret; }