X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fsamsung%2Ftrats%2Ftrats.c;h=472402942442da0c16e2d530e33c89e36fed7927;hb=a098cf41fdb2a6607c675f7fe4f3164617c9367e;hp=4f9cb5a7e5bbf13331d7e83bef8b41471bced994;hpb=a241d6ef43168ff80dfc28eed55f5f94266bda46;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 4f9cb5a..4724029 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -29,15 +29,19 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
 #include <asm/arch/watchdog.h>
 #include <asm/arch/power.h>
-#include <pmic.h>
+#include <power/pmic.h>
 #include <usb/s3c_udc.h>
-#include <max8997_pmic.h>
+#include <power/max8997_pmic.h>
 #include <libtizen.h>
+#include <power/max8997_muic.h>
+#include <power/battery.h>
+#include <power/max17042_fg.h>
 
 #include "setup.h"
 
@@ -68,9 +72,289 @@ int board_init(void)
 	check_hw_revision();
 	printf("HW Revision:\t0x%x\n", board_rev);
 
-#if defined(CONFIG_PMIC)
-	pmic_init();
-#endif
+	return 0;
+}
+
+void i2c_init_board(void)
+{
+	struct exynos4_gpio_part1 *gpio1 =
+		(struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+
+	/* I2C_5 -> PMIC */
+	s5p_gpio_direction_output(&gpio1->b, 7, 1);
+	s5p_gpio_direction_output(&gpio1->b, 6, 1);
+	/* I2C_9 -> FG */
+	s5p_gpio_direction_output(&gpio2->y4, 0, 1);
+	s5p_gpio_direction_output(&gpio2->y4, 1, 1);
+}
+
+static void trats_low_power_mode(void)
+{
+	struct exynos4_clock *clk =
+	    (struct exynos4_clock *)samsung_get_base_clock();
+	struct exynos4_power *pwr =
+	    (struct exynos4_power *)samsung_get_base_power();
+
+	/* Power down CORE1 */
+	/* LOCAL_PWR_CFG [1:0] 0x3 EN, 0x0 DIS */
+	writel(0x0, &pwr->arm_core1_configuration);
+
+	/* Change the APLL frequency */
+	/* ENABLE (1 enable) | LOCKED (1 locked)  */
+	/* [31]              | [29]               */
+	/* FSEL      | MDIV          | PDIV            | SDIV */
+	/* [27]      | [25:16]       | [13:8]          | [2:0]      */
+	writel(0xa0c80604, &clk->apll_con0);
+
+	/* Change CPU0 clock divider */
+	/* CORE2_RATIO  | APLL_RATIO   | PCLK_DBG_RATIO | ATB_RATIO  */
+	/* [30:28]      | [26:24]      | [22:20]        | [18:16]    */
+	/* PERIPH_RATIO | COREM1_RATIO | COREM0_RATIO   | CORE_RATIO */
+	/* [14:12]      | [10:8]       | [6:4]          | [2:0]      */
+	writel(0x00000100, &clk->div_cpu0);
+
+	/* CLK_DIV_STAT_CPU0 - wait until clock gets stable (0 = stable) */
+	while (readl(&clk->div_stat_cpu0) & 0x1111111)
+		continue;
+
+	/* Change clock divider ratio for DMC */
+	/* DMCP_RATIO                  | DMCD_RATIO  */
+	/* [22:20]                     | [18:16]     */
+	/* DMC_RATIO | DPHY_RATIO | ACP_PCLK_RATIO   | ACP_RATIO */
+	/* [14:12]   | [10:8]     | [6:4]            | [2:0]     */
+	writel(0x13113117, &clk->div_dmc0);
+
+	/* CLK_DIV_STAT_DMC0 - wait until clock gets stable (0 = stable) */
+	while (readl(&clk->div_stat_dmc0) & 0x11111111)
+		continue;
+
+	/* Turn off unnecessary power domains */
+	writel(0x0, &pwr->xxti_configuration);	/* XXTI */
+	writel(0x0, &pwr->cam_configuration);	/* CAM */
+	writel(0x0, &pwr->tv_configuration);    /* TV */
+	writel(0x0, &pwr->mfc_configuration);   /* MFC */
+	writel(0x0, &pwr->g3d_configuration);   /* G3D */
+	writel(0x0, &pwr->gps_configuration);   /* GPS */
+	writel(0x0, &pwr->gps_alive_configuration);	/* GPS_ALIVE */
+
+	/* Turn off unnecessary clocks */
+	writel(0x0, &clk->gate_ip_cam);	/* CAM */
+	writel(0x0, &clk->gate_ip_tv);          /* TV */
+	writel(0x0, &clk->gate_ip_mfc);	/* MFC */
+	writel(0x0, &clk->gate_ip_g3d);	/* G3D */
+	writel(0x0, &clk->gate_ip_image);	/* IMAGE */
+	writel(0x0, &clk->gate_ip_gps);	/* GPS */
+}
+
+static int pmic_init_max8997(void)
+{
+	struct pmic *p = pmic_get("MAX8997_PMIC");
+	int i = 0, ret = 0;
+	u32 val;
+
+	if (pmic_probe(p))
+		return -1;
+
+	/* BUCK1 VARM: 1.2V */
+	val = (1200000 - 650000) / 25000;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK1DVS1, val);
+	val = ENBUCK | ACTIVE_DISCHARGE;		/* DVS OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK1CTRL, val);
+
+	/* BUCK2 VINT: 1.1V */
+	val = (1100000 - 650000) / 25000;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK2DVS1, val);
+	val = ENBUCK | ACTIVE_DISCHARGE;		/* DVS OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK2CTRL, val);
+
+
+	/* BUCK3 G3D: 1.1V - OFF */
+	ret |= pmic_reg_read(p, MAX8997_REG_BUCK3CTRL, &val);
+	val &= ~ENBUCK;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK3CTRL, val);
+
+	val = (1100000 - 750000) / 50000;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK3DVS, val);
+
+	/* BUCK4 CAMISP: 1.2V - OFF */
+	ret |= pmic_reg_read(p, MAX8997_REG_BUCK4CTRL, &val);
+	val &= ~ENBUCK;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK4CTRL, val);
+
+	val = (1200000 - 650000) / 25000;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK4DVS, val);
+
+	/* BUCK5 VMEM: 1.2V */
+	val = (1200000 - 650000) / 25000;
+	for (i = 0; i < 8; i++)
+		ret |= pmic_reg_write(p, MAX8997_REG_BUCK5DVS1 + i, val);
+
+	val = ENBUCK | ACTIVE_DISCHARGE;		/* DVS OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK5CTRL, val);
+
+	/* BUCK6 CAM AF: 2.8V */
+	/* No Voltage Setting Register */
+	/* GNSLCT 3.0X */
+	val = GNSLCT;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK6CTRL, val);
+
+	/* BUCK7 VCC_SUB: 2.0V */
+	val = (2000000 - 750000) / 50000;
+	ret |= pmic_reg_write(p, MAX8997_REG_BUCK7DVS, val);
+
+	/* LDO1 VADC: 3.3V */
+	val = max8997_reg_ldo(3300000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO1CTRL, val);
+
+	/* LDO1 Disable active discharging */
+	ret |= pmic_reg_read(p, MAX8997_REG_LDO1CONFIG, &val);
+	val &= ~LDO_ADE;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO1CONFIG, val);
+
+	/* LDO2 VALIVE: 1.1V */
+	val = max8997_reg_ldo(1100000) | EN_LDO;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO2CTRL, val);
+
+	/* LDO3 VUSB/MIPI: 1.1V */
+	val = max8997_reg_ldo(1100000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, val);
+
+	/* LDO4 VMIPI: 1.8V */
+	val = max8997_reg_ldo(1800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, val);
+
+	/* LDO5 VHSIC: 1.2V */
+	val = max8997_reg_ldo(1200000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO5CTRL, val);
+
+	/* LDO6 VCC_1.8V_PDA: 1.8V */
+	val = max8997_reg_ldo(1800000) | EN_LDO;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO6CTRL, val);
+
+	/* LDO7 CAM_ISP: 1.8V */
+	val = max8997_reg_ldo(1800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO7CTRL, val);
+
+	/* LDO8 VDAC/VUSB: 3.3V */
+	val = max8997_reg_ldo(3300000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, val);
+
+	/* LDO9 VCC_2.8V_PDA: 2.8V */
+	val = max8997_reg_ldo(2800000) | EN_LDO;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO9CTRL, val);
+
+	/* LDO10 VPLL: 1.1V */
+	val = max8997_reg_ldo(1100000) | EN_LDO;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO10CTRL, val);
+
+	/* LDO11 TOUCH: 2.8V */
+	val = max8997_reg_ldo(2800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO11CTRL, val);
+
+	/* LDO12 VTCAM: 1.8V */
+	val = max8997_reg_ldo(1800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO12CTRL, val);
+
+	/* LDO13 VCC_3.0_LCD: 3.0V */
+	val = max8997_reg_ldo(3000000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, val);
+
+	/* LDO14 MOTOR: 3.0V */
+	val = max8997_reg_ldo(3000000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO14CTRL, val);
+
+	/* LDO15 LED_A: 2.8V */
+	val = max8997_reg_ldo(2800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, val);
+
+	/* LDO16 CAM_SENSOR: 1.8V */
+	val = max8997_reg_ldo(1800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO16CTRL, val);
+
+	/* LDO17 VTF: 2.8V */
+	val = max8997_reg_ldo(2800000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO17CTRL, val);
+
+	/* LDO18 TOUCH_LED 3.3V */
+	val = max8997_reg_ldo(3300000) | DIS_LDO;	/* OFF */
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO18CTRL, val);
+
+	/* LDO21 VDDQ: 1.2V */
+	val = max8997_reg_ldo(1200000) | EN_LDO;
+	ret |= pmic_reg_write(p, MAX8997_REG_LDO21CTRL, val);
+
+	/* SAFEOUT for both 1 and 2: 4.9V, Active discharge, Enable */
+	val = (SAFEOUT_4_90V << 0) | (SAFEOUT_4_90V << 2) |
+		ACTDISSAFEO1 | ACTDISSAFEO2 | ENSAFEOUT1 | ENSAFEOUT2;
+	ret |= pmic_reg_write(p, MAX8997_REG_SAFEOUTCTRL, val);
+
+	if (ret) {
+		puts("MAX8997 PMIC setting error!\n");
+		return -1;
+	}
+	return 0;
+}
+
+int power_init_board(void)
+{
+	int chrg, ret;
+	struct power_battery *pb;
+	struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
+
+	ret = pmic_init(I2C_5);
+	ret |= pmic_init_max8997();
+	ret |= power_fg_init(I2C_9);
+	ret |= power_muic_init(I2C_5);
+	ret |= power_bat_init(0);
+	if (ret)
+		return ret;
+
+	p_fg = pmic_get("MAX17042_FG");
+	if (!p_fg) {
+		puts("MAX17042_FG: Not found\n");
+		return -ENODEV;
+	}
+
+	p_chrg = pmic_get("MAX8997_PMIC");
+	if (!p_chrg) {
+		puts("MAX8997_PMIC: Not found\n");
+		return -ENODEV;
+	}
+
+	p_muic = pmic_get("MAX8997_MUIC");
+	if (!p_muic) {
+		puts("MAX8997_MUIC: Not found\n");
+		return -ENODEV;
+	}
+
+	p_bat = pmic_get("BAT_TRATS");
+	if (!p_bat) {
+		puts("BAT_TRATS: Not found\n");
+		return -ENODEV;
+	}
+
+	p_fg->parent =  p_bat;
+	p_chrg->parent = p_bat;
+	p_muic->parent = p_bat;
+
+	p_bat->low_power_mode = trats_low_power_mode;
+	p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
+
+	pb = p_bat->pbat;
+	chrg = p_muic->chrg->chrg_type(p_muic);
+	debug("CHARGER TYPE: %d\n", chrg);
+
+	if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
+		puts("No battery detected\n");
+		return -1;
+	}
+
+	p_fg->fg->fg_battery_check(p_fg, p_bat);
+
+	if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
+		puts("CHARGE Battery !\n");
 
 	return 0;
 }
@@ -78,7 +362,9 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
 
 	return 0;
 }
@@ -89,6 +375,10 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 }
 
 static unsigned int get_hw_revision(void)
@@ -136,54 +426,22 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit@48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit@26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
-	}
-
-	/*
 	 * MMC device init
 	 * mmc0	 : eMMC (8-bit buswidth)
 	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	err = s5p_mmc_init(0, 8);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -194,24 +452,11 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
@@ -223,7 +468,9 @@ static int s5pc210_phy_control(int on)
 {
 	int ret = 0;
 	u32 val = 0;
-	struct pmic *p = get_pmic();
+	struct pmic *p = pmic_get("MAX8997_PMIC");
+	if (!p)
+		return -ENODEV;
 
 	if (pmic_probe(p))
 		return -1;
@@ -344,6 +591,10 @@ static void board_power_init(void)
 	writel(0, (unsigned int)&pwr->lcd1_configuration);
 	writel(0, (unsigned int)&pwr->gps_configuration);
 	writel(0, (unsigned int)&pwr->gps_alive_configuration);
+
+	/* It is necessary to power down core 1 */
+	/* to successfully boot CPU1 in kernel */
+	writel(0, (unsigned int)&pwr->arm_core1_configuration);
 }
 
 static void board_uart_init(void)
@@ -398,7 +649,9 @@ static void lcd_reset(void)
 static int lcd_power(void)
 {
 	int ret = 0;
-	struct pmic *p = get_pmic();
+	struct pmic *p = pmic_get("MAX8997_PMIC");
+	if (!p)
+		return -ENODEV;
 
 	if (pmic_probe(p))
 		return 0;
@@ -458,7 +711,9 @@ static struct mipi_dsim_lcd_device mipi_lcd_device = {
 static int mipi_power(void)
 {
 	int ret = 0;
-	struct pmic *p = get_pmic();
+	struct pmic *p = pmic_get("MAX8997_PMIC");
+	if (!p)
+		return -ENODEV;
 
 	if (pmic_probe(p))
 		return 0;