X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Frenesas%2FMigoR%2Flowlevel_init.S;h=e32a7afb49055ed6896a8d04521eb69cade9a30c;hb=14d0a02a168b36e87665b8d7f42fa3e88263d26d;hp=1da603a9fe749ed63d3d481df5ea2343042c0b0a;hpb=f7e78f3b74aae9caca2997bad865a72338326c0a;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/renesas/MigoR/lowlevel_init.S b/board/renesas/MigoR/lowlevel_init.S
index 1da603a..e32a7af 100644
--- a/board/renesas/MigoR/lowlevel_init.S
+++ b/board/renesas/MigoR/lowlevel_init.S
@@ -117,7 +117,7 @@ bsc_init:
 
 	write32	RFCR_A, RFCR_D
 
-	write8	SDMR3_A, #0x00
+	write8	SDMR3_A, SDMR3_D
 
 	! BL bit off (init = ON) (?!?)
 
@@ -195,6 +195,7 @@ RFCR_A:		.long	SBSC_RFCR
 RFCR_D:		.long	0xA55A0221
 RTCSR_D:	.long	0xA55A009a
 SDMR3_A:	.long	0xFE581180
+SDMR3_D:	.long	0x0
 
 SR_MASK_D:	.long	0xEFFFFF0F