X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fovero%2Fovero.c;h=adf33cfd37e328558f122306592b5bbd24598ef5;hb=4125bbcef6a998ce8580a1f5c53c8c93a56a125b;hp=b7f85e711b46fed4bed4b35774599d929d382c7a;hpb=9b416a9f4ca7cf5ac4d5f7143d67edde7f7d7326;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/overo/overo.c b/board/overo/overo.c index b7f85e7..adf33cf 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -27,7 +27,7 @@ #include #include "overo.h" -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD #include #include #endif @@ -68,117 +68,18 @@ static struct { } expansion_config = {0x0}; static const struct ns16550_platdata overo_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK, + .fcr = UART_FCR_DEFVAL, }; U_BOOT_DEVICE(overo_uart) = { - "serial_omap", + "ns16550_serial", &overo_serial }; /* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OVERO; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - - return 0; -} - -/* - * Routine: get_board_revision - * Description: Returns the board revision - */ -int get_board_revision(void) -{ - int revision; - -#ifdef CONFIG_SYS_I2C_OMAP34XX - unsigned char data; - - /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */ - /* these boards should return a revision number of 0 */ - /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */ - i2c_set_bus_num(TWL4030_I2C_BUS); - data = 0x01; - i2c_write(0x4B, 0x29, 1, &data, 1); - data = 0x0c; - i2c_write(0x4B, 0x2b, 1, &data, 1); - i2c_read(0x4B, 0x2a, 1, &data, 1); -#endif - - if (!gpio_request(112, "") && - !gpio_request(113, "") && - !gpio_request(115, "")) { - - gpio_direction_input(112); - gpio_direction_input(113); - gpio_direction_input(115); - - revision = gpio_get_value(115) << 2 | - gpio_get_value(113) << 1 | - gpio_get_value(112); - } else { - puts("Error: unable to acquire board revision GPIOs\n"); - revision = -1; - } - - return revision; -} - -#ifdef CONFIG_SPL_BUILD -/* - * Routine: get_board_mem_timings - * Description: If we use SPL then there is no x-loader nor config header - * so we have to setup the DDR timings ourself on both banks. - */ -void get_board_mem_timings(struct board_sdrc_timings *timings) -{ - timings->mr = MICRON_V_MR_165; - switch (get_board_revision()) { - case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */ - timings->mcfg = MICRON_V_MCFG_165(128 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - break; - case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ - case REVISION_4: - timings->mcfg = MICRON_V_MCFG_200(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ - timings->mcfg = HYNIX_V_MCFG_200(256 << 20); - timings->ctrla = HYNIX_V_ACTIMA_200; - timings->ctrlb = HYNIX_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */ - timings->mcfg = MCFG(512 << 20, 15); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - default: - timings->mcfg = MICRON_V_MCFG_165(128 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - } -} -#endif - -/* * Routine: get_sdio2_config * Description: Return information about the wifi module connection * Returns 0 if the module connects though a level translator @@ -287,6 +188,7 @@ int misc_init_r(void) expansion_config.revision, expansion_config.fab_revision); MUX_GUMSTIX(); + setenv("expansionname", "tobiduo"); break; case GUMSTIX_PALO35: printf("Recognized Palo35 expansion board (rev %d %s)\n", @@ -294,6 +196,7 @@ int misc_init_r(void) expansion_config.fab_revision); MUX_GUMSTIX(); setenv("defaultdisplay", "lcd35"); + setenv("expansionname", "palo35"); break; case GUMSTIX_PALO43: printf("Recognized Palo43 expansion board (rev %d %s)\n", @@ -359,6 +262,7 @@ int misc_init_r(void) MUX_GUMSTIX(); MUX_ARBOR43C(); setenv("defaultdisplay", "lcd43"); + setenv("expansionname", "arbor43c"); break; case ETTUS_USRP_E: printf("Recognized Ettus Research USRP-E (rev %d %s)\n", @@ -382,7 +286,7 @@ int misc_init_r(void) if (expansion_config.content == 1) setenv(expansion_config.env_var, expansion_config.env_setting); - dieid_num_r(); + omap_die_id_display(); if (get_cpu_family() == CPU_OMAP34XX) setenv("boardname", "overo"); @@ -392,18 +296,7 @@ int misc_init_r(void) return 0; } -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - MUX_OVERO(); -} - -#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_CMD_NET) /* GPMC definitions for LAN9221 chips on Tobi expansion boards */ static const u32 gpmc_lan_config[] = { NET_LAN9221_GPMC_CONFIG1, @@ -486,21 +379,21 @@ int board_eth_init(bd_t *bis) } #endif -#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_MMC) int board_mmc_init(bd_t *bis) { return omap_mmc_init(0, 0, 0, -1, -1); } #endif -#if defined(CONFIG_GENERIC_MMC) +#if defined(CONFIG_MMC) void board_mmc_power_init(void) { twl4030_power_mmc_init(0); } #endif -#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_USB_EHCI_HCD) static struct omap_usbhs_board_data usbhs_bdata = { .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, @@ -527,4 +420,4 @@ int ehci_hcd_stop(void) return omap_ehci_hcd_stop(); } -#endif /* CONFIG_USB_EHCI */ +#endif /* CONFIG_USB_EHCI_HCD */