X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fmpl%2Fcommon%2Fpci_parts.h;h=75e8cae6d7fac82f66d50f73378ea59a70d70959;hb=da684a646d0c94f7a6126e7ecf110278691465a6;hp=7bca961c5c4440f6f10283f6d891e2a3cccffcb4;hpb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index 7bca961..75e8cae 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -2,24 +2,7 @@
  * (C) Copyright 2001
  * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef _PCI_PARTS_H_
 #define _PCI_PARTS_H_
@@ -63,7 +46,7 @@
 
 /* Mapping:
  * +-------------+------------+------------+--------------------------------+
- * ¦ PCI MemAddr | PCI IOAddr | Local Addr | Device / Function              |
+ * | PCI MemAddr | PCI IOAddr | Local Addr | Device / Function              |
  * +-------------+------------+------------+--------------------------------+
  * |  0x00000000 |            | 0xA0000000 | ISA Memory (hard wired)        |
  * |  0x00FFFFFF |            | 0xA0FFFFFF |                                |
@@ -108,7 +91,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {
 static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 	{PCI_CFG_PIIX4_BMIBA,	0x0001000,	4}, /* set BMI to a valid address */
 	{PCI_COMMAND,		0x0001,		2}, /* enable IO access	*/
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_CFG_PIIX4_IDETIM,	0x80008000,	4}, /* enable Both IDE channels	*/
 #else
 	{PCI_CFG_PIIX4_IDETIM,	0x00008000,	4}, /* enable IDE channel0	*/
@@ -118,7 +101,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 
 /* PIIX4 USB Controller Function 2 */
 static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_INTERRUPT_LINE,	31,		1}, /* Int vector = 31		*/
 	{PCI_BASE_ADDRESS_4,	0x0000E001,	4}, /* Set IO Address to 0xe000 to 0xe01F */
 	{PCI_LATENCY_TIMER,	0x80,		1}, /* Latency Timer 0x80	*/