X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fkeymile%2Fkm83xx%2Fkm83xx.c;h=6a7b848161454080cc144cfc572682a01cf3017d;hb=b8e09898919e23c5d7f1934be7bf9a3a6f0deb0e;hp=8f7e7f05d82bcdaf5d7d3f6a7d94318a51999ebb;hpb=a5e609b982a004e009e8ee0aa6066785db425ac2;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 8f7e7f0..6a7b848 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -18,13 +18,16 @@ #include #include #include +#include #include #include #include +#include #include #include #include #include +#include #include #include @@ -34,91 +37,6 @@ DECLARE_GLOBAL_DATA_PTR; static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; -const qe_iop_conf_t qe_iop_conf_tab[] = { - /* port pin dir open_drain assign */ -#if defined(CONFIG_ARCH_MPC8360) - /* MDIO */ - {0, 1, 3, 0, 2}, /* MDIO */ - {0, 2, 1, 0, 1}, /* MDC */ - - /* UCC4 - UEC */ - {1, 14, 1, 0, 1}, /* TxD0 */ - {1, 15, 1, 0, 1}, /* TxD1 */ - {1, 20, 2, 0, 1}, /* RxD0 */ - {1, 21, 2, 0, 1}, /* RxD1 */ - {1, 18, 1, 0, 1}, /* TX_EN */ - {1, 26, 2, 0, 1}, /* RX_DV */ - {1, 27, 2, 0, 1}, /* RX_ER */ - {1, 24, 2, 0, 1}, /* COL */ - {1, 25, 2, 0, 1}, /* CRS */ - {2, 15, 2, 0, 1}, /* TX_CLK - CLK16 */ - {2, 16, 2, 0, 1}, /* RX_CLK - CLK17 */ - - /* DUART - UART2 */ - {5, 0, 1, 0, 2}, /* UART2_SOUT */ - {5, 2, 1, 0, 1}, /* UART2_RTS */ - {5, 3, 2, 0, 2}, /* UART2_SIN */ - {5, 1, 2, 0, 3}, /* UART2_CTS */ -#elif !defined(CONFIG_ARCH_MPC8309) - /* Local Bus */ - {0, 16, 1, 0, 3}, /* LA00 */ - {0, 17, 1, 0, 3}, /* LA01 */ - {0, 18, 1, 0, 3}, /* LA02 */ - {0, 19, 1, 0, 3}, /* LA03 */ - {0, 20, 1, 0, 3}, /* LA04 */ - {0, 21, 1, 0, 3}, /* LA05 */ - {0, 22, 1, 0, 3}, /* LA06 */ - {0, 23, 1, 0, 3}, /* LA07 */ - {0, 24, 1, 0, 3}, /* LA08 */ - {0, 25, 1, 0, 3}, /* LA09 */ - {0, 26, 1, 0, 3}, /* LA10 */ - {0, 27, 1, 0, 3}, /* LA11 */ - {0, 28, 1, 0, 3}, /* LA12 */ - {0, 29, 1, 0, 3}, /* LA13 */ - {0, 30, 1, 0, 3}, /* LA14 */ - {0, 31, 1, 0, 3}, /* LA15 */ - - /* MDIO */ - {3, 4, 3, 0, 2}, /* MDIO */ - {3, 5, 1, 0, 2}, /* MDC */ - - /* UCC4 - UEC */ - {1, 18, 1, 0, 1}, /* TxD0 */ - {1, 19, 1, 0, 1}, /* TxD1 */ - {1, 22, 2, 0, 1}, /* RxD0 */ - {1, 23, 2, 0, 1}, /* RxD1 */ - {1, 26, 2, 0, 1}, /* RxER */ - {1, 28, 2, 0, 1}, /* Rx_DV */ - {1, 30, 1, 0, 1}, /* TxEN */ - {1, 31, 2, 0, 1}, /* CRS */ - {3, 10, 2, 0, 3}, /* TxCLK->CLK17 */ -#endif - - /* END of table */ - {0, 0, 0, 0, QE_IOP_TAB_END}, -}; - -#if defined(CONFIG_SUVD3) -const uint upma_table[] = { - 0x1ffedc00, 0x0ffcdc80, 0x0ffcdc80, 0x0ffcdc04, /* Words 0 to 3 */ - 0x0ffcdc00, 0xffffcc00, 0xffffcc01, 0xfffffc01, /* Words 4 to 7 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 8 to 11 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 12 to 15 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 16 to 19 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 20 to 23 */ - 0x9cfffc00, 0x00fffc80, 0x00fffc80, 0x00fffc00, /* Words 24 to 27 */ - 0xffffec04, 0xffffec01, 0xfffffc01, 0xfffffc01, /* Words 28 to 31 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 32 to 35 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 36 to 39 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 40 to 43 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 44 to 47 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 48 to 51 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 52 to 55 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 56 to 59 */ - 0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01 /* Words 60 to 63 */ -}; -#endif - static int piggy_present(void) { struct km_bec_fpga __iomem *base = @@ -136,11 +54,6 @@ int board_early_init_r(void) { struct km_bec_fpga *base = (struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE; -#if defined(CONFIG_SUVD3) - immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - fsl_lbc_t *lbc = &immap->im_lbc; - u32 *mxmr = &lbc->mamr; -#endif #if defined(CONFIG_ARCH_MPC8360) unsigned short svid; @@ -176,12 +89,6 @@ int board_early_init_r(void) /* enable Application Buffer */ setbits_8(&base->oprtl, OPRTL_XBUFENA); -#if defined(CONFIG_SUVD3) - /* configure UPMA for APP1 */ - upmconfig(UPMA, (uint *) upma_table, - sizeof(upma_table) / sizeof(uint)); - out_be32(mxmr, CONFIG_SYS_MAMR); -#endif return 0; } @@ -195,8 +102,10 @@ int misc_init_r(void) int last_stage_init(void) { #if defined(CONFIG_TARGET_KMCOGE5NE) - struct bfticu_iomap *base = - (struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE; + /* + * BFTIC3 on the local bus CS4 + */ + struct bfticu_iomap *base = (struct bfticu_iomap *)0xB0000000; u8 dip_switch = in_8((u8 *)&(base->mswitch)) & BFTICU_DIPSWITCH_MASK; if (dip_switch != 0) { @@ -232,12 +141,11 @@ static int fixed_sdram(void) udelay(200); setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN); - msize = CONFIG_SYS_DDR_SIZE << 20; disable_addr_trans(); - msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, msize); + msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); enable_addr_trans(); msize /= (1024 * 1024); - if (CONFIG_SYS_DDR_SIZE != msize) { + if (CONFIG_SYS_SDRAM_SIZE >> 20 != msize) { for (ddr_size = msize << 20, ddr_size_log2 = 0; (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) @@ -279,7 +187,7 @@ int dram_init(void) int checkboard(void) { - puts("Board: ABB " CONFIG_SYS_CONFIG_NAME); + puts("Board: Hitachi " CONFIG_SYS_CONFIG_NAME); if (piggy_present()) puts(" with PIGGY."); @@ -287,7 +195,7 @@ int checkboard(void) return 0; } -int ft_board_setup(void *blob, bd_t *bd) +int ft_board_setup(void *blob, struct bd_info *bd) { ft_cpu_setup(blob, bd); @@ -330,12 +238,8 @@ void post_word_store(ulong value) int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset) { - /* - * These match CONFIG_SYS_MEMTEST_START and - * (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) - */ - *vstart = 0x00100000; - *size = 0xe00000; + *vstart = CONFIG_SYS_MEMTEST_START; + *size = CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START; debug("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size); return 0;