X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fjse%2Finit.S;h=92f43f4fc7d242fb653645215d1450cb31614625;hb=297a65873d2cb2bd296253af51f59cc1391afbff;hp=c564ed3c94ec36a28d2a3ccd43c53d3c19aa080b;hpb=32d4e38eeb5bcc2f854787bfa68bea2b55eaa1d7;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/jse/init.S b/board/jse/init.S index c564ed3..92f43f4 100644 --- a/board/jse/init.S +++ b/board/jse/init.S @@ -1,5 +1,9 @@ /*------------------------------------------------------------------------+ */ /* */ +/* This source code is dual-licensed. You may use it under the terms */ +/* of the GNU General Public License version 2, or under the license */ +/* below. */ +/* */ /* This source code has been made available to you by IBM on an AS-IS */ /* basis. Anyone receiving this source is licensed under IBM */ /* copyrights to use it in any way he or she deems fit, including */ @@ -48,8 +52,6 @@ #include #include -#define cpc0_cr0 0xB1 - .globl ext_bus_cntlr_init ext_bus_cntlr_init: mflr r4 /* save link register */ @@ -80,16 +82,16 @@ ext_bus_cntlr_init: /* Memory Bank 0 (Flash) initialization */ /*----------------------------------------------------------------- */ - addi r4,0,pb0ap - mtdcr ebccfga,r4 + addi r4,0,PB1AP + mtdcr EBC0_CFGADDR,r4 addis r4,0,0x9B01 ori r4,r4,0x5480 - mtdcr ebccfgd,r4 + mtdcr EBC0_CFGDATA,r4 - addi r4,0,pb0cr - mtdcr ebccfga,r4 + addi r4,0,PB0CR + mtdcr EBC0_CFGADDR,r4 addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */ ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ - mtdcr ebccfgd,r4 + mtdcr EBC0_CFGDATA,r4 blr