X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffunkwerk%2Fvovpn-gw%2Fvovpn-gw.c;h=d33563b8d849fcdfd835155bfd388224b42b7850;hb=1a4596601fd395f3afb8f82f3f840c5e00bdd57a;hp=9b5429afa525f390acd82353d1739ff09120eb38;hpb=2c4faea84f3d96d674e3c065e1f220b20c8930c0;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c index 9b5429a..d33563b 100644 --- a/board/funkwerk/vovpn-gw/vovpn-gw.c +++ b/board/funkwerk/vovpn-gw/vovpn-gw.c @@ -4,20 +4,7 @@ * * Support for the Elmeg VoVPN Gateway Module * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -25,6 +12,7 @@ #include #include #include +#include #include "m88e6060.h" @@ -189,7 +177,7 @@ void reset_phy (void) unsigned short val; #endif - iop = ioport_addr((immap_t *)CFG_IMMR, 0); + iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0); /* Reset the PHY */ iop->pdat &= 0xfff7ffff; /* PA12 = |SWITCH_RESET */ @@ -198,12 +186,12 @@ void reset_phy (void) iop->pdat |= 0x00080000; for (i=0; i<100; i++) { udelay(20000); - if (bb_miiphy_read("FCC1 ETHERNET", CFG_PHY_ADDR,2,&val ) == 0) { + if (bb_miiphy_read("FCC1", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) { break; } } /* initialize switch */ - m88e6060_initialize( CFG_PHY_ADDR ); + m88e6060_initialize( CONFIG_SYS_PHY_ADDR ); #endif } @@ -233,7 +221,7 @@ int board_early_init_f (void) volatile unsigned char *dummy; int i; - immap = (immap_t *) CFG_IMMR; + immap = (immap_t *) CONFIG_SYS_IMMR; memctl = &immap->im_memctl; #if 0 @@ -263,7 +251,7 @@ int board_early_init_f (void) int misc_init_r (void) { volatile ioport_t *iop; - unsigned char temp; + __maybe_unused unsigned char temp; #if 0 /* DUMP UPMA RAM */ volatile immap_t *immap; @@ -272,7 +260,7 @@ int misc_init_r (void) unsigned char c; int i; - immap = (immap_t *) CFG_IMMR; + immap = (immap_t *) CONFIG_SYS_IMMR; memctl = &immap->im_memctl; @@ -289,7 +277,7 @@ int misc_init_r (void) memctl->memc_mamr = 0x00044440; #endif /* enable buffers (DSP, DPRAM) */ - iop = ioport_addr((immap_t *)CFG_IMMR, 0); + iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0); iop->pdat &= 0xfffbffff; /* PA13 = |EN_M_BCTL1 */ /* destroy DPRAM magic */ @@ -306,11 +294,11 @@ int misc_init_r (void) #if defined(CONFIG_HAVE_OWN_RESET) int -do_reset (void *cmdtp, int flag, int argc, char *argv[]) +do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { volatile ioport_t *iop; - iop = ioport_addr((immap_t *)CFG_IMMR, 2); + iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 2); iop->pdat |= 0x00002000; /* PC18 = HW_RESET */ return 1; } @@ -318,18 +306,18 @@ do_reset (void *cmdtp, int flag, int argc, char *argv[]) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT volatile immap_t *immap; volatile memctl8260_t *memctl; volatile uchar *ramaddr; int i; uchar c; - immap = (immap_t *) CFG_IMMR; + immap = (immap_t *) CONFIG_SYS_IMMR; memctl = &immap->im_memctl; - ramaddr = (uchar *) CFG_SDRAM_BASE; + ramaddr = (uchar *) CONFIG_SYS_SDRAM_BASE; c = 0xff; immap->im_siu_conf.sc_ppc_acr = 0x02; @@ -338,30 +326,30 @@ long int initdram (int board_type) immap->im_siu_conf.sc_tescr1 = 0x00000000; immap->im_siu_conf.sc_tescr2 = 0x00000000; - memctl->memc_mptpr = CFG_MPTPR; - memctl->memc_psrt = CFG_PSRT; - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_SDRAM_BASE | CFG_BR1_PRELIM; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | CONFIG_SYS_BR1_PRELIM; /* Precharge all banks */ - memctl->memc_psdmr = CFG_PSDMR | 0x28000000; + memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x28000000; *ramaddr = c; /* CBR refresh */ - memctl->memc_psdmr = CFG_PSDMR | 0x08000000; + memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x08000000; for (i = 0; i < 8; i++) *ramaddr = c; /* Mode Register write */ - memctl->memc_psdmr = CFG_PSDMR | 0x18000000; + memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x18000000; *ramaddr = c; /* Refresh enable */ - memctl->memc_psdmr = CFG_PSDMR | 0x40000000; + memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x40000000; *ramaddr = c; -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ - return (CFG_SDRAM_SIZE); + return (CONFIG_SYS_SDRAM_SIZE); } int checkboard (void)