X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffreescale%2Fmx53loco%2Fmx53loco.c;h=f8f0503f9f99b23007e704fd6ec702a9c70dff90;hb=30ea4be921634de193236355f76e7870f1a3cb89;hp=7ed5c4e4dacbac8c0e8d184f335a4832edf473cd;hpb=ed5157e8895a6bf59a8163329639e34db0702331;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 7ed5c4e..f8f0503 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -38,6 +39,11 @@ #include #include #include +#include +#include +#include + +#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) DECLARE_GLOBAL_DATA_PTR; @@ -61,6 +67,21 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; } +u32 get_board_rev(void) +{ + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + int rev = readl(&fuse->gp[6]); + + if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) + rev = 0; + + return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; +} + static void setup_iomux_uart(void) { /* UART1 RXD */ @@ -84,10 +105,9 @@ static void setup_iomux_uart(void) #ifdef CONFIG_USB_EHCI_MX5 int board_ehci_hcd_init(int port) { - /* request VBUS power enable pin, GPIO[8}, gpio7 */ + /* request VBUS power enable pin, GPIO7_8 */ mxc_request_iomux(MX53_PIN_ATA_DA_2, IOMUX_CONFIG_ALT1); - gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 0); - gpio_set_value(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 1); + gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_ATA_DA_2), 1); return 0; } #endif @@ -146,8 +166,8 @@ static void setup_iomux_fec(void) #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2] = { - {MMC_SDHC1_BASE_ADDR, 1}, - {MMC_SDHC3_BASE_ADDR, 1}, + {MMC_SDHC1_BASE_ADDR}, + {MMC_SDHC3_BASE_ADDR}, }; int board_mmc_getcd(struct mmc *mmc) @@ -156,14 +176,14 @@ int board_mmc_getcd(struct mmc *mmc) int ret; mxc_request_iomux(MX53_PIN_EIM_DA11, IOMUX_CONFIG_ALT1); - gpio_direction_input(75); + gpio_direction_input(IMX_GPIO_NR(3, 11)); mxc_request_iomux(MX53_PIN_EIM_DA13, IOMUX_CONFIG_ALT1); - gpio_direction_input(77); + gpio_direction_input(IMX_GPIO_NR(3, 13)); if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - ret = !gpio_get_value(77); /* GPIO3_13 */ + ret = !gpio_get_value(IMX_GPIO_NR(3, 13)); else - ret = !gpio_get_value(75); /* GPIO3_11 */ + ret = !gpio_get_value(IMX_GPIO_NR(3, 11)); return ret; } @@ -173,6 +193,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: @@ -319,23 +342,55 @@ static void setup_iomux_i2c(void) static int power_init(void) { - unsigned int val, ret; + unsigned int val; + int ret = -1; struct pmic *p; - pmic_dialog_init(); - p = get_pmic(); + if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { + pmic_dialog_init(); + p = get_pmic(); + + /* Set VDDA to 1.25V */ + val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; + ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); - /* Set VDDA to 1.25V */ - val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; - ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); + ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val); + val |= DA9052_SUPPLY_VBCOREGO; + ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val); - ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val); - val |= DA9052_SUPPLY_VBCOREGO; - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val); + /* Set Vcc peripheral to 1.30V */ + ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); + ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + } - /* Set Vcc peripheral to 1.35V */ - ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { + pmic_init(); + p = get_pmic(); + + /* Set VDDGP to 1.25V for 1GHz on SW1 */ + pmic_reg_read(p, REG_SW_0, &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; + ret = pmic_reg_write(p, REG_SW_0, val); + + /* Set VCC as 1.30V on SW2 */ + pmic_reg_read(p, REG_SW_1, &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; + ret |= pmic_reg_write(p, REG_SW_1, val); + + /* Set global reset timer to 4s */ + pmic_reg_read(p, REG_POWER_CTL2, &val); + val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; + ret |= pmic_reg_write(p, REG_POWER_CTL2, val); + + /* Set VUSBSEL and VUSBEN for USB PHY supply*/ + pmic_reg_read(p, REG_MODE_0, &val); + val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); + ret |= pmic_reg_write(p, REG_MODE_0, val); + + /* Set SWBST to 5V in auto mode */ + val = SWBST_AUTO; + ret |= pmic_reg_write(p, SWBST_CTRL, val); + } return ret; } @@ -343,7 +398,7 @@ static int power_init(void) static void clock_1GHz(void) { int ret; - u32 ref_clk = CONFIG_SYS_MX5_HCLK; + u32 ref_clk = MXC_HCLK; /* * After increasing voltage to 1.25V, we can switch * CPU clock to 1GHz and DDR to 400MHz safely @@ -362,6 +417,7 @@ int board_early_init_f(void) { setup_iomux_uart(); setup_iomux_fec(); + setup_iomux_lcd(); return 0; } @@ -380,23 +436,26 @@ int print_cpuinfo(void) return 0; } -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) { - setup_iomux_i2c(); - if (!power_init()) - clock_1GHz(); - print_cpuinfo(); - - return 0; + return 1; } -#endif int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; mxc_set_sata_internal_clock(); + setup_iomux_i2c(); + if (!power_init()) + clock_1GHz(); + print_cpuinfo(); + + lcd_enable(); return 0; }