X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffreescale%2Fmpc8610hpcd%2Fmpc8610hpcd.c;h=2ac169b7909f946367c08443e9e5b50a6d20f055;hb=84efbf4d144ff8aaed3cca036aebb1fe69eff3f4;hp=159e7d1d8190f6b23e11b3df1547bf7912ab0108;hpb=c06d9bbbeb0416f189e841ffb214ada6194ed874;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 159e7d1..2ac169b 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include @@ -37,7 +37,7 @@ #include "../common/pixis.h" void sdram_init(void); -long int fixed_sdram(void); +phys_size_t fixed_sdram(void); void mpc8610hpcd_diu_init(void); @@ -55,16 +55,17 @@ int board_early_init_f(void) int misc_init_r(void) { u8 tmp_val, version; + u8 *pixis_base = (u8 *)PIXIS_BASE; /*Do not use 8259PIC*/ - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80); /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ - version = in8(PIXIS_BASE + PIXIS_PVER); + version = in_8(pixis_base + PIXIS_PVER); if(version >= 0x07) { - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf); } /* Using this for DIU init before the driver in linux takes over @@ -96,11 +97,12 @@ int checkboard(void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; + u8 *pixis_base = (u8 *)PIXIS_BASE; printf ("Board: MPC8610HPCD, System ID: 0x%02x, " "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); mcm->abcr |= 0x00010000; /* 0 */ mcm->hpmr3 = 0x80000008; /* 4c */ @@ -117,7 +119,7 @@ int checkboard(void) phys_size_t initdram(int board_type) { - long dram_size = 0; + phys_size_t dram_size = 0; #if defined(CONFIG_SPD_EEPROM) dram_size = fsl_ddr_sdram(); @@ -140,7 +142,7 @@ initdram(int board_type) * Fixed sdram init -- doesn't use serial presence detect. */ -long int fixed_sdram(void) +phys_size_t fixed_sdram(void) { #if !defined(CONFIG_SYS_RAMBOOT) volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; @@ -154,7 +156,7 @@ long int fixed_sdram(void) ddr->timing_cfg_0 = 0x00260802; ddr->timing_cfg_1 = 0x3935d322; ddr->timing_cfg_2 = 0x14904cc8; - ddr->sdram_mode_1 = 0x00480432; + ddr->sdram_mode = 0x00480432; ddr->sdram_mode_2 = 0x00000000; ddr->sdram_interval = 0x06180fff; /* 0x06180100; */ ddr->sdram_data_init = 0xDEADBEEF; @@ -170,7 +172,7 @@ long int fixed_sdram(void) udelay(500); - ddr->sdram_cfg_1 = 0xc3000000; /* 0xe3008000;*/ + ddr->sdram_cfg = 0xc3000000; /* 0xe3008000;*/ #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) @@ -229,9 +231,6 @@ static struct pci_controller pcie2_hose; int first_free_busno = 0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; @@ -266,14 +265,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BASE, + CONFIG_SYS_PCIE1_MEM_BUS, CONFIG_SYS_PCIE1_MEM_PHYS, CONFIG_SYS_PCIE1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCIE1_IO_BASE, + CONFIG_SYS_PCIE1_IO_BUS, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_SIZE, PCI_REGION_IO); @@ -321,14 +320,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BASE, + CONFIG_SYS_PCIE2_MEM_BUS, CONFIG_SYS_PCIE2_MEM_PHYS, CONFIG_SYS_PCIE2_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCIE2_IO_BASE, + CONFIG_SYS_PCIE2_IO_BUS, CONFIG_SYS_PCIE2_IO_PHYS, CONFIG_SYS_PCIE2_IO_SIZE, PCI_REGION_IO); @@ -370,14 +369,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BASE, + CONFIG_SYS_PCI1_MEM_BUS, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCI1_IO_BASE, + CONFIG_SYS_PCI1_IO_BUS, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); @@ -402,9 +401,6 @@ void pci_init_board(void) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { @@ -444,10 +440,9 @@ get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; - ulong a; + u8 *pixis_base = (u8 *)PIXIS_BASE; - a = PIXIS_BASE + PIXIS_SPD; - i = in8(a); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -484,3 +479,13 @@ int board_eth_init(bd_t *bis) { return pci_eth_init(bis); } + +void board_reset(void) +{ + u8 *pixis_base = (u8 *)PIXIS_BASE; + + out_8(pixis_base + PIXIS_RST, 0); + + while (1) + ; +}