X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffreescale%2Fm5329evb%2Fnand.c;h=a10c365ec3788fd2ab9caaa46d3af73f6ef68868;hb=1cefed1e39f0038ac6afd9e0c48b8b85fb458fbc;hp=cf27dda2ffef8272c17f570c9f818df9658c91e0;hpb=156feb90d200f186cdfd856d7f6f1878bb1bec1e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/freescale/m5329evb/nand.c b/board/freescale/m5329evb/nand.c
index cf27dda..a10c365 100644
--- a/board/freescale/m5329evb/nand.c
+++ b/board/freescale/m5329evb/nand.c
@@ -1,27 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #include <config.h>
@@ -29,28 +12,29 @@
 #include <asm/io.h>
 #include <asm/immap.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #if defined(CONFIG_CMD_NAND)
 #include <nand.h>
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
 
 #define SET_CLE		0x10
 #define SET_ALE		0x08
 
 static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
 {
-	struct nand_chip *this = mtdinfo->priv;
+	struct nand_chip *this = mtd_to_nand(mtdinfo);
 	volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR;
 
 	if (ctrl & NAND_CTRL_CHANGE) {
 		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
 		IO_ADDR_W &= ~(SET_ALE | SET_CLE);
-		*nCE &= 0xFFFB;
 
 		if (ctrl & NAND_NCE)
+			*nCE &= 0xFFFB;
+		else
 			*nCE |= 0x0004;
+
 		if (ctrl & NAND_CLE)
 			IO_ADDR_W |= SET_CLE;
 		if (ctrl & NAND_ALE)
@@ -65,20 +49,20 @@ static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
 
 int board_nand_init(struct nand_chip *nand)
 {
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/*
 	 * set up pin configuration - enabled 2nd output buffer's signals
 	 * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
 	 * to use nCE signal
 	 */
-	gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3;
-	gpio->pddr_timer |= 0x08;
-	gpio->ppd_timer |= 0x08;
-	gpio->pclrr_timer = 0;
-	gpio->podr_timer = 0;
+	clrbits_8(&gpio->par_timer, GPIO_PAR_TIN3_TIN3);
+	setbits_8(&gpio->pddr_timer, 0x08);
+	setbits_8(&gpio->ppd_timer, 0x08);
+	out_8(&gpio->pclrr_timer, 0);
+	out_8(&gpio->podr_timer, 0);
 
-	nand->chip_delay = 50;
+	nand->chip_delay = 60;
 	nand->ecc.mode = NAND_ECC_SOFT;
 	nand->cmd_ctrl = nand_hwcontrol;