X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffreescale%2Fls1021aqds%2Fls1021aqds.c;h=d0674d014ac5aabdeb77d13498241fe77be9c9dd;hb=6cc04547cb3bbd3a3d78947f200acbae19e3c67f;hp=aa1f6025c1342d10cecaa407dbc03b07442ae18a;hpb=2147a16983d17bcb0438607aa7760494afc27014;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index aa1f602..d0674d0 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 NXP + * Copyright 2019, 2021 NXP */ #include @@ -20,11 +20,11 @@ #include #include #include -#include #include #include #include #include +#include "../common/i2c_mux.h" #include "../common/sleep.h" #include "../common/qixis.h" #include "ls1021aqds_qixis.h" @@ -101,6 +101,7 @@ int checkboard(void) return 0; } +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ unsigned long get_board_sys_clk(void) { u8 sysclk_conf = QIXIS_READ(brdcfg[1]); @@ -125,7 +126,9 @@ unsigned long get_board_sys_clk(void) } return 66666666; } +#endif +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); @@ -140,31 +143,7 @@ unsigned long get_board_ddr_clk(void) } return 66666666; } - -int select_i2c_ch_pca9547(u8 ch, int bus_num) -{ - int ret; -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return ret; - } - ret = dm_i2c_write(dev, 0, &ch, 1); -#else - ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); #endif - if (ret) { - puts("PCA: failed to select proper channel\n"); - return ret; - } - - return 0; -} int dram_init(void) { @@ -181,7 +160,7 @@ int dram_init(void) int board_early_init_f(void) { - struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CFG_SYS_FSL_SCFG_ADDR; #ifdef CONFIG_TSEC_ENET /* clear BD & FR bits for BE BD's and frame data */ @@ -206,7 +185,7 @@ int board_early_init_f(void) void board_init_f(ulong dummy) { #ifdef CONFIG_NAND_BOOT - struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; + struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; u32 porsr1, pinctl; /* @@ -237,7 +216,7 @@ void board_init_f(ulong dummy) preloader_console_init(); -#ifdef CONFIG_SPL_I2C_SUPPORT +#ifdef CONFIG_SPL_I2C i2c_init_all(); #endif @@ -255,7 +234,7 @@ void board_init_f(ulong dummy) void config_etseccm_source(int etsec_gtx_125_mux) { - struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CFG_SYS_FSL_SCFG_ADDR; switch (etsec_gtx_125_mux) { case GE0_CLK125: @@ -329,7 +308,7 @@ int config_board_mux(int ctrl_type) int config_serdes_mux(void) { - struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_FSL_GUTS_ADDR; + struct ccsr_gur *gur = (struct ccsr_gur *)CFG_SYS_FSL_GUTS_ADDR; u32 cfg; cfg = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK; @@ -409,9 +388,6 @@ int misc_init_r(void) #ifdef CONFIG_FSL_DEVICE_DISABLE device_disable(devdis_tbl, ARRAY_SIZE(devdis_tbl)); #endif -#ifdef CONFIG_FSL_CAAM - return sec_init(); -#endif return 0; }