X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Ffreescale%2Fc29xpcie%2FREADME;h=a6120f1845d2a7af90e5b61d679df246dfc9951a;hb=04909251fdecac9d05e527b83e86e043e8df00ea;hp=430f08244a5361e90b2e84f794bf59fe3c632288;hpb=4eef93da262048eb1118e726b3ec5b8ebd3c6c91;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/freescale/c29xpcie/README b/board/freescale/c29xpcie/README index 430f0824..a6120f1 100644 --- a/board/freescale/c29xpcie/README +++ b/board/freescale/c29xpcie/README @@ -53,18 +53,17 @@ Settings of DIP-switch SW5[1:4]= 0110 and SW5[6]=0 for boot from SPI flash Note: 1 stands for 'off', 0 stands for 'on' -Build and program u-boot to NOR flash +Build and program U-Boot to NOR flash ================================== 1. Build u-boot.bin image example: - export ARCH=powerpc export CROSS_COMPILE=/your_path/powerpc-linux-gnu- make C293PCIE 2. Program u-boot.bin into NOR flash => tftp $loadaddr $uboot - => protect off eff80000 +$filesize - => erase eff80000 +$filesize - => cp.b $loadaddr eff80000 $filesize + => protect off eff40000 +$filesize + => erase eff40000 +$filesize + => cp.b $loadaddr eff40000 $filesize 3. Check SW5[1:4]= 1111 and SW5[6]=0, then power on. @@ -73,9 +72,9 @@ Alternate NOR bank There are four banks in C29XPCIE board, example to change bank booting: 1. Program u-boot.bin into alternate NOR bank => tftp $loadaddr $uboot - => protect off e9f80000 +$filesize - => erase e9f80000 +$filesize - => cp.b $loadaddr e9f80000 $filesize + => protect off e9f40000 +$filesize + => erase e9f40000 +$filesize + => cp.b $loadaddr e9f40000 $filesize 2. Switch to alternate NOR bank => cpld_cmd reset altbank [bank] @@ -86,7 +85,7 @@ There are four banks in C29XPCIE board, example to change bank booting: - bank 4 on the flash 0x3000000~0x3ffffff or set SW5[7]= ON/OFF and SW5[7]= ON/OFF, then power on again. -Build and program u-boot to SPI flash +Build and program U-Boot to SPI flash ================================== 1. Build u-boot-spi.bin image make C29xPCIE_SPIFLASH_config; make