X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fel%2Fel6x%2Fel6x.c;h=55db26a819a0e73f1f52d247a338744af499866b;hb=0b7f1a95df8fe312ff8f1f548f51e6d656e8e67e;hp=6b98b5c3ebda90c4788d57ef939c3d70930a09f7;hpb=1fdafb2e3dfecdc4129a8062ad25b1adb32b0efb;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index 6b98b5c..55db26a 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -1,9 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) Stefano Babic * * Based on other i.MX6 boards - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -17,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -25,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -255,7 +255,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, @@ -480,7 +480,7 @@ int checkboard(void) #ifdef CONFIG_SPL_BUILD #include -#include +#include const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { .dram_sdclk_0 = 0x00020030, @@ -570,17 +570,6 @@ static void ccgr_init(void) writel(0x000003FF, &ccm->CCGR6); } -static void gpr_init(void) -{ - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; - - /* enable AXI cache for VDOA/VPU/IPU */ - writel(0xF00000CF, &iomux->gpr[4]); - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ - writel(0x007F007F, &iomux->gpr[6]); - writel(0x007F007F, &iomux->gpr[7]); -} - /* * This section requires the differentiation between iMX6 Sabre boards, but * for now, it will configure only for the mx6q variant.