X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fcobra5272%2Fflash.c;h=5d15ed4e691dad5a51c618dfdeb773e82c7e7b90;hb=b8e09898919e23c5d7f1934be7bf9a3a6f0deb0e;hp=73cc2f2c10c1e563ef5e458e070b2a01f9ac895b;hpb=7a635e004ec12bd2a0bae9f90fbb5769b524a42e;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c index 73cc2f2..5d15ed4 100644 --- a/board/cobra5272/flash.c +++ b/board/cobra5272/flash.c @@ -1,34 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2000-2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA */ #include - -#define PHYS_FLASH_1 CFG_FLASH_BASE +#include +#include +#include +#include +#include +#include + +#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE #define FLASH_BANK_SIZE 0x200000 -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; -void flash_print_info (flash_info_t * info) +void flash_print_info(flash_info_t *info) { int i; @@ -65,23 +54,24 @@ void flash_print_info (flash_info_t * info) printf ("\n"); Done: + return; } -unsigned long flash_init (void) +unsigned long flash_init(void) { int i, j; ulong size = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { ulong flashbase = 0; flash_info[i].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_PL160CB & FLASH_TYPEMASK); flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CFG_MAX_FLASH_SECT; - memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); + flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; + memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); if (i == 0) flashbase = PHYS_FLASH_1; else @@ -111,9 +101,9 @@ unsigned long flash_init (void) size += flash_info[i].size; } - flash_protect (FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + 0x3ffff, &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]); return size; } @@ -127,8 +117,8 @@ unsigned long flash_init (void) #define CMD_PROGRAM 0x00A0 #define CMD_UNLOCK_BYPASS 0x0020 -#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1))) -#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1))) +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1))) #define BIT_ERASE_DONE 0x0080 #define BIT_RDY_MASK 0x0080 @@ -140,12 +130,13 @@ unsigned long flash_init (void) #define TMO 4 -int flash_erase (flash_info_t * info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { ulong result; int iflag, cflag, prot, sect; int rc = ERR_OK; int chip1; + ulong start; /* first look for protection bits */ @@ -178,9 +169,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) * chip is in programming mode. */ - cflag = icache_status (); - icache_disable (); - iflag = disable_interrupts (); + cflag = icache_status(); + icache_disable(); + iflag = disable_interrupts(); printf ("\n"); @@ -189,7 +180,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ volatile u16 *addr = @@ -209,8 +200,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) do { result = *addr; - /* check timeout */ - if (get_timer (0) > CFG_FLASH_ERASE_TOUT) { + /* check timeout, 1000ms */ + if (get_timer(start) > 1000) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; break; @@ -229,7 +220,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) goto outahere; } if (chip1 == TMO) { - rc = ERR_TIMOUT; + rc = ERR_TIMEOUT; goto outahere; } @@ -245,24 +236,25 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) outahere: /* allow flash to settle - wait 10 ms */ - udelay (10000); + mdelay(10); if (iflag) - enable_interrupts (); + enable_interrupts(); if (cflag) - icache_enable (); + icache_enable(); return rc; } -static int write_word (flash_info_t * info, ulong dest, ulong data) +static int write_word(flash_info_t *info, ulong dest, ulong data) { volatile u16 *addr = (volatile u16 *) dest; ulong result; int rc = ERR_OK; int cflag, iflag; int chip1; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -280,9 +272,9 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) * chip is in programming mode. */ - cflag = icache_status (); - icache_disable (); - iflag = disable_interrupts (); + cflag = icache_status(); + icache_disable(); + iflag = disable_interrupts(); MEM_FLASH_ADDR1 = CMD_UNLOCK1; MEM_FLASH_ADDR2 = CMD_UNLOCK2; @@ -290,15 +282,15 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); /* wait until flash is ready */ chip1 = 0; do { result = *addr; - /* check timeout */ - if (get_timer (0) > CFG_FLASH_ERASE_TOUT) { + /* check timeout, 1000ms */ + if (get_timer(start) > 1000) { chip1 = ERR | TMO; break; } @@ -313,16 +305,16 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) rc = ERR_PROG_ERROR; if (iflag) - enable_interrupts (); + enable_interrupts(); if (cflag) - icache_enable (); + icache_enable(); return rc; } -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong wp, data; int rc;