X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Fcmc_pu2%2Fflash.c;h=0419d7620026cf9fc008f1485ad6bba8bb97c3a7;hb=5a1aceb0689e2f731491838970884a673ef7e7d3;hp=9baa473bdf46bde92b3b38c56ce81c0c79119562;hpb=9d5028c2f7a65d3777867a6cfc966a01a5823132;p=platform%2Fkernel%2Fu-boot.git diff --git a/board/cmc_pu2/flash.c b/board/cmc_pu2/flash.c index 9baa473..0419d76 100644 --- a/board/cmc_pu2/flash.c +++ b/board/cmc_pu2/flash.c @@ -29,26 +29,21 @@ #include -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* - * CPU to flash interface is 32-bit, so make declaration accordingly - */ -typedef unsigned short FLASH_PORT_WIDTH; -typedef volatile unsigned short FLASH_PORT_WIDTHV; +#ifndef CFG_ENV_ADDR +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) +#endif -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #define FLASH_CYCLE1 0x0555 -#define FLASH_CYCLE2 0x02aa +#define FLASH_CYCLE2 0x02AA /*----------------------------------------------------------------------- * Functions */ -static ulong flash_get_size(FPWV *addr, flash_info_t *info); +static ulong flash_get_size(vu_short *addr, flash_info_t *info); static void flash_reset(flash_info_t *info); -static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data); +static int write_word_amd(flash_info_t *info, vu_short *dest, ushort data); static flash_info_t *flash_get_info(ulong base); /*----------------------------------------------------------------------- @@ -64,8 +59,7 @@ unsigned long flash_init (void) /* Init: no FLASHes known */ memset(&flash_info[0], 0, sizeof(flash_info_t)); - flash_info[0].size = - flash_get_size((FPW *)flashbase, &flash_info[0]); + flash_info[0].size = flash_get_size((vu_short *)flashbase, &flash_info[0]); size = flash_info[0].size; @@ -77,7 +71,7 @@ unsigned long flash_init (void) flash_get_info(CFG_MONITOR_BASE)); #endif -#ifdef CFG_ENV_IS_IN_FLASH +#ifdef CONFIG_ENV_IS_IN_FLASH /* ENV protection ON by default */ flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, @@ -92,13 +86,13 @@ unsigned long flash_init (void) */ static void flash_reset(flash_info_t *info) { - FPWV *base = (FPWV *)(info->start[0]); + vu_short *base = (vu_short *)(info->start[0]); /* Put FLASH back in read mode */ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) - *base = (FPW)0x00FF00FF; /* Intel Read Mode */ + *base = 0x00FF; /* Intel Read Mode */ else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) - *base = (FPW)0x00F000F0; /* AMD Read Mode */ + *base = 0x00F0; /* AMD Read Mode */ } /*----------------------------------------------------------------------- @@ -176,56 +170,60 @@ void flash_print_info (flash_info_t *info) * The following code cannot be run from FLASH! */ -ulong flash_get_size (FPWV *addr, flash_info_t *info) +ulong flash_get_size (vu_short *addr, flash_info_t *info) { int i; + ushort value; ulong base = (ulong)addr; - /* Write auto select command: read Manufacturer ID */ - /* Write auto select command sequence and test FLASH answer */ - addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */ - addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */ - addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */ + /* Write auto select command sequence */ + addr[FLASH_CYCLE1] = 0x00AA; /* for AMD, Intel ignores this */ + addr[FLASH_CYCLE2] = 0x0055; /* for AMD, Intel ignores this */ + addr[FLASH_CYCLE1] = 0x0090; /* selects Intel or AMD */ - /* The manufacturer codes are only 1 byte, so just use 1 byte. - * This works for any bus width and any FLASH device width. - */ + /* read Manufacturer ID */ udelay(100); - switch (addr[0] & 0xff) { + value = addr[0]; + debug ("Manufacturer ID: %04X\n", value); + + switch (value) { - case (uchar)AMD_MANUFACT: - printf ("Manufacturer: AMD (Spansion)\n"); + case (AMD_MANUFACT & 0xFFFF): + debug ("Manufacturer: AMD (Spansion)\n"); info->flash_id = FLASH_MAN_AMD; break; - case (uchar)INTEL_MANUFACT: - printf ("Manufacturer: Intel (not supported yet)\n"); + case (INTEL_MANUFACT & 0xFFFF): + debug ("Manufacturer: Intel (not supported yet)\n"); info->flash_id = FLASH_MAN_INTEL; break; default: + printf ("Unknown Manufacturer ID: %04X\n", value); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; - break; + goto out; } - /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ - if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) { + value = addr[1]; + debug ("Device ID: %04X\n", value); + + switch (addr[1]) { - case AMD_ID_MIRROR: - printf ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n", + case (AMD_ID_MIRROR & 0xFFFF): + debug ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n", addr[14], addr[15]); - switch(addr[14] & 0xffff) { - case (AMD_ID_GL064M_2 & 0xffff): + switch(addr[14]) { + case (AMD_ID_GL064M_2 & 0xFFFF): if (addr[15] != (AMD_ID_GL064M_3 & 0xffff)) { printf ("Chip: S29GLxxxM -> unknown\n"); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; } else { - printf ("Chip: S29GL064M-R6\n"); + debug ("Chip: S29GL064M-R6\n"); info->flash_id += FLASH_S29GL064M; info->sector_count = 128; info->size = 0x00800000; @@ -245,11 +243,14 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) break; default: + printf ("Unknown Device ID: %04X\n", value); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; + break; } +out: /* Put FLASH back in read mode */ flash_reset(info); @@ -261,20 +262,20 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { - FPWV *addr = (FPWV *)(info->start[0]); - int flag, prot, sect, l_sect; - ulong start, now, last; + vu_short *addr = (vu_short *)(info->start[0]); + int flag, prot, sect, ssect, l_sect; + ulong now, last; - printf ("flash_erase: first: %d last: %d\n", s_first, s_last); + debug ("flash_erase: first: %d last: %d\n", s_first, s_last); if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf ("- missing\n"); } else { printf ("- no sectors to erase\n"); - } + } return 1; - } + } if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { @@ -297,58 +298,70 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - l_sect = -1; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - addr[0x0555] = 0x00AA; - addr[0x02AA] = 0x0055; - addr[0x0555] = 0x0080; - addr[0x0555] = 0x00AA; - addr[0x02AA] = 0x0055; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FPWV *)(info->start[sect]); - addr[0] = 0x0030; - l_sect = sect; + /* + * Start erase on unprotected sectors. + * Since the flash can erase multiple sectors with one command + * we take advantage of that by doing the erase in chunks of + * 3 sectors. + */ + for (sect = s_first; sect <= s_last; ) { + l_sect = -1; + + addr[FLASH_CYCLE1] = 0x00AA; + addr[FLASH_CYCLE2] = 0x0055; + addr[FLASH_CYCLE1] = 0x0080; + addr[FLASH_CYCLE1] = 0x00AA; + addr[FLASH_CYCLE2] = 0x0055; + + /* do the erase in chunks of at most 3 sectors */ + for (ssect = 0; ssect < 3; ssect++) { + if ((sect + ssect) > s_last) + break; + if (info->protect[sect + ssect] == 0) { /* not protected */ + addr = (vu_short *)(info->start[sect + ssect]); + addr[0] = 0x0030; + l_sect = sect + ssect; + } + } + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + reset_timer_masked (); + last = 0; + addr = (vu_short *)(info->start[l_sect]); + while ((addr[0] & 0x0080) != 0x0080) { + if ((now = get_timer_masked ()) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } } + addr = (vu_short *)info->start[0]; + addr[0] = 0x00F0; /* reset bank */ + sect += ssect; } /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FPWV *)(info->start[l_sect]); - while ((addr[0] & 0x00000080) != 0x00000080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } - } - DONE: /* reset to read mode */ - addr = (FPWV *)info->start[0]; - addr[0] = 0x000000F0; /* reset bank */ + addr = (vu_short *)info->start[0]; + addr[0] = 0x00F0; /* reset bank */ printf (" done\n"); return 0; @@ -379,8 +392,9 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) wp = addr; while (cnt >= 2) { - data = *((FPWV *)src); - if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) { + data = *((vu_short *)src); + if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) { +printf ("write_buff 1: write_word_amd() rc=%d\n", rc); return (rc); } src += 2; @@ -389,13 +403,13 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) } if (cnt == 0) { - return (0); + return (ERR_OK); } if (cnt == 1) { - data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) - << 8); - if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) { + data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << 8); + if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) { +printf ("write_buff 1: write_word_amd() rc=%d\n", rc); return (rc); } src += 1; @@ -416,25 +430,24 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * 1 - write timeout * 2 - Flash not erased */ -static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) +static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data) { - ulong start; int flag; - FPWV *base; /* first address in flash bank */ + vu_short *base; /* first address in flash bank */ /* Check if Flash is (sufficiently) erased */ if ((*dest & data) != data) { return (2); } - base = (FPWV *)(info->start[0]); + base = (vu_short *)(info->start[0]); /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ - base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ - base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */ + base[FLASH_CYCLE1] = 0x00AA; /* unlock */ + base[FLASH_CYCLE2] = 0x0055; /* unlock */ + base[FLASH_CYCLE1] = 0x00A0; /* selects program mode */ *dest = data; /* start programming the data */ @@ -442,12 +455,12 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) if (flag) enable_interrupts(); - start = get_timer (0); + reset_timer_masked (); /* data polling for D7 */ - while ((*dest & (FPW)0x00000080) != (data & (FPW)0x00000080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - *dest = (FPW)0x000000F0; /* reset bank */ + while ((*dest & 0x0080) != (data & 0x0080)) { + if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { + *dest = 0x00F0; /* reset bank */ return (1); } }