X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=board%2Famcc%2Fkilauea%2Fkilauea.c;h=7e84a61a96da1a3e7d00f3c7de73bc96c8cee3df;hb=6d0f6bcf337c5261c08fabe12982178c2c489d76;hp=f407e195be7b9533e05e119b38c54280d69e8c4d;hpb=71edc271816ec82cf0550dd6980be2da3cc2ad9e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index f407e19..7e84a61 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -36,7 +36,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
 /*
  * Board early initialization function
@@ -197,7 +197,7 @@ int board_early_init_f (void)
 		SDR0_CUST0_NDFC_ENABLE |
 		SDR0_CUST0_NDFC_BW_8_BIT |
 		SDR0_CUST0_NRB_BUSY |
-		(0x80000000 >> (28 + CFG_NAND_CS));
+		(0x80000000 >> (28 + CONFIG_SYS_NAND_CS));
 	mtsdr(SDR0_CUST0, val);
 
 	/*
@@ -210,9 +210,9 @@ int board_early_init_f (void)
 	/*
 	 * Configure FPGA register with PCIe reset
 	 */
-	out_be32((void *)CFG_FPGA_BASE, 0xff570cc4);	/* assert PCIe reset */
+	out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc4);	/* assert PCIe reset */
 	mdelay(50);
-	out_be32((void *)CFG_FPGA_BASE, 0xff570cc7);	/* deassert PCIe reset */
+	out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc7);	/* deassert PCIe reset */
 
 	return 0;
 }
@@ -222,7 +222,7 @@ int misc_init_r(void)
 #ifdef CONFIG_ENV_IS_IN_FLASH
 	/* Monitor protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
-		      -CFG_MONITOR_LEN,
+		      -CONFIG_SYS_MONITOR_LEN,
 		      0xffffffff,
 		      &flash_info[0]);
 #endif
@@ -330,9 +330,9 @@ void pcie_setup_hoses(int busno)
 
 		/* setup mem resource */
 		pci_set_region(hose->regions + 0,
-			       CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
-			       CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
-			       CFG_PCIE_MEMSIZE,
+			       CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
+			       CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
+			       CONFIG_SYS_PCIE_MEMSIZE,
 			       PCI_REGION_MEM);
 		hose->region_count = 1;
 		pci_register_hose(hose);